About TStru.1

TStru.1 · 2021-10-22

I have a successful emmc image running on my STM32MP157FAD. However, fw_env.config is incorrect. This is my first project using FIP and I'm a little confused where the uboot environment variables are now located.Partition Layout:/dev/mmcblk1p1 3...

TStru.1 · 2021-08-02

I am attempting to configure my device tree to support RMII with Crystal on PHY, no 50Mhz from PHY. I have made the following modifications based on https://wiki.st.com/stm32mpu/wiki/Ethernet_device_tree_configuration#RGMII_with_Crystal_on_PHY-2C_no_...

TStru.1 · 2021-03-31

I'm DDR tuning a custom STM32MP157F board with 4GB DDR3. All DDR tests are passing however I get the following tuning failure for Bit Deskew: Failed [Cannot Deskew lines, there is no PASS region] and Eye Training: [Cannot DQS timings, there is no PA...

TStru.1 · 2021-01-07

I am building uboot spl for DDR testing of a custom board based on the STM32MP157FAD1 MPU. The design uses I2C6 to communicate with the PMIC. The following error occurs: "stm32mp1_clk_get_id: clk id 142 not found". Any suggestions on why the I2C6 clo...

TStru.1 · 2021-10-24

It appears that the environment is stored at the end of the fip partition. The correct fw_env.config is:/dev/mmcblk1p1 -0x2000 0x2000 /dev/mmcblk1p1 -0x4000 0x2000

TStru.1 · 2021-01-27

Hi Patrick,That worked perfectly. Thanks for your assistance!

TStru.1 · 2021-01-12

Hi Oliver,Thanks for the continued support. Unfortunately we are still having the same issue after reviewing the device tree numerous times and following the Lab-BringUpFromPartNumber-V2.pdf referenced in https://community.st.com/s/article/FAQ-STM32M...

TStru.1 · 2021-01-11

Hi Oliver,I am using stm32mp1-openstlinux-5-4-dunfell-mp1-20-11-12. The TF-A build is working with I2C6. The issue seems to be specific to u-boot SPL. I did see the following comment on the release notes https://wiki.st.com/stm32mpu/wiki/STM32MP15_ec...

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Proper fw_env.config settings for emmc layout with fip

Device Tree configuration for RMII with Crystal on PHY, no 50Mhz from PHY

DDR tuning fails Bit Deskew and Eye Training

UBoot SPL DDR Testing on STM32MP157FAD1 error stm32mp1_clk_get_id: clk id 142 not found

Re: Proper fw_env.config settings for emmc layout with fip

Re: UBoot SPL DDR Testing on STM32MP157FAD1 error stm32mp1_clk_get_id: clk id 142 not found

Re: UBoot SPL DDR Testing on STM32MP157FAD1 error stm32mp1_clk_get_id: clk id 142 not found

Re: UBoot SPL DDR Testing on STM32MP157FAD1 error stm32mp1_clk_get_id: clk id 142 not found