2022-01-25 09:02 AM
Dear all,
I need to design a custom board for LoRa 868MHz network.
The AN5457 provides the design example considering the +22 dBm (when using RFO_HP) or +14 dBm (when using RFO_LP)) with UFQFPN48 package.
Also, the output impedance is reported for different output power and optimal settings (Appendix A1.7).
I'm interested in using the UFBGA package, which is the same used in the Altium reference design available here for the NUCLEO-WL55JC: https://www.st.com/resource/en/schematic_pack/mb1389-wl55jc-highband-e02_schematic.pdf
In the above design, the matching network for the RFO_LP is different from the one provided within the application node AN5457 even if the +14dBm power is considered. See below:
This is a bit confusing to me. Is the output impedance different for the UFBGA package?
If yes, where those impedances can be found?
It is difficult to follow the design steps you provided in the AN when, within the Altium design, the chosen component values are different from the ones in the AN.
Could someone help me understand why there is this mismatch?
Thanks in advance
2022-01-31 12:14 AM
Hello,
Thank you for your interest.
There is a single optimal impendance seen by the chip when in UFBGA package.
But Matching Network depends also on the board.
In one part, you are referring to nucleo design, which is a demo board convering worl-wide market and with constraints associated to it.
In the AN5457, the fosus is on optimizing a board for more focused application.
FOr UFBGA, you can have a look to the nucleo project, but I suggest you to also have a look to :https://www.st.com/en/evaluation-tools/stdes-i4s.html
Best Regards,
Benoit
2022-01-31 12:57 AM
Dear @Benoit MARCHAND ,
thanks a lot for your reply.
As you said, there is an optimal output impedance with UFBGA package. Where is reported this impedance?
Suppose I want to design a custom board with selectable RFO_HP and RFO_LP (as happens in the nucleo board).
Suppose I would like to target the same power as in the nucleo:
Which is the right approach? I would follow the AN5457 steps, but the impedance for UFBGA package is not available.
If I understood correctly:
Is that right?
Second question: is your suggestion to use the reference project https://www.st.com/en/evaluation-tools/stdes-i4s.html, manufacture it and develop custom electronics as a shield for that board? Leaving the STM32WL and the RF part on that PCB alone?
Thanks for your precious suggestions.
2022-02-18 02:26 AM
Dear @Benoit MARCHAND ,
I have checked the reference design https://www.st.com/en/evaluation-tools/stdes-i4s.html, but I cannot find some important information.
The board MB1842 can used for both HP and LP depending on the BOM on the RF part (see image below). However, I cannot find the values for the following RF components for the LP configuration I'm interested in:
Could you help me finding this information somewhere? I would like to manufacture this board but without all the information it is not possible.
Thanks in advance.
2022-03-08 04:37 AM
Dear Customer,
Some updates will be made in the next two months concerning Stm32wl reference designs, for the moment, use the BOM and the documentation attached in this answer to your design implementation.
Concerning your questions:
L6, L8 (missing in the BOM), no information in the reference design document
- Refer to the attached document
L5 appears two times in the provided BOM (7.5nH and 12nH). Which one is for what configuration?
- Use 7.5nH
C36 missing from the BOM
- Refer to the attached document
C24 appears two times with completely different values (2.2pF and 100nF). Which one is correct?
- Use 100nF
Best regards,
Fernando
2022-03-08 04:43 AM