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innophase_dinot
Visitor II
July 1, 2024
Solved

Nucleo-WBA52CG issue after hard reset

  • July 1, 2024
  • 2 replies
  • 1128 views

Hi,

I have a NUCLEO-WBA52CG dev board.

I am seeing an issue whenever I do hard reset for the first time after power-on.
After power-on my the loaded application works as expected, after a hard reset(using the button), the clock configuration seems to be about 44% what is expected.

This behavior can be observed with the BSP example for the board. Basically the delays between LED blinks are longer. I also had an application that prints something via UART and the output was garbage on my serial terminal until i adjusted the baud rate accordingly.
I have not fully tested what else is non-functional but other peripherals may also be affected since my other application(Using SPI, DMA, interrupts, etc) was no longer working as expected instead of just running slower.

Interestingly, a second reset fixes the issue. A third reset goes back to the problem state, and then another reset it is again working as expected.


This topic has been closed for replies.
Best answer by Remy ISSALYS

Hello,

It's a know issue on STM32WBA5x revision A describe in stm32wba5x device errata sheet (ES0592), see part "2.2.3 SYSCLK may not reach the PLL1 frequency when step switch is enabled". The workaround is implemented in HAL under the STM32WBAXX_SI_CUT1_0 define. To solve your issue, you have to set this define in your project. 

Best Regards 

2 replies

STTwo-32
STTwo-32
ST Technical Moderator
July 2, 2024

Hello @innophase_dinot and welcome to the ST Community :smiling_face_with_smiling_eyes:.

I've been able to reproduce the behavior that you have seen on the BSP example, and I've reported to the Community For correction (under internal ticket number 185548). For other behavior, I'm not able to reproduce, can you give more details about how to reproduce them.

Best Regards.

STTwo-32

 

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Remy ISSALYS
Remy ISSALYSBest answer
ST Technical Moderator
July 4, 2024

Hello,

It's a know issue on STM32WBA5x revision A describe in stm32wba5x device errata sheet (ES0592), see part "2.2.3 SYSCLK may not reach the PLL1 frequency when step switch is enabled". The workaround is implemented in HAL under the STM32WBAXX_SI_CUT1_0 define. To solve your issue, you have to set this define in your project. 

Best Regards 

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