2021-08-15 06:47 PM
Greetings,
From what I've read of the Cube code and guidance in AN5289, we enter STM32WB low power states by putting the M4 into the low power state we want. If we need the M0 to continue to advertise, for example, we would configure it to do so and then put the M4 into low power.
I have two questions, related, to this use case.
1) Is this a correct understanding how how we are supposed to put the STM32WB into a low power state, e.g. stop2? Can we put the M4 into stop2 while waiting for a BLE connect event. When the event generates an interrupt, the M4 awakens and can handle to event. Does the M0 always go into low-power states? What triggers it?
Or, do we need to also send an explicit message to the M0 telling it we plan to go into low power? I haven't found any code doing this, but there is an SHCI opcode SHCI_OCF_C2_RADIO_ALLOW_LOW_POWER which is 0x6d. There doesn't seem to be an example that uses this code.
2) What will the M0 do when we are configured to use HSE for RF wakeup instead of LSE and put the M4 into a low-power state? I haven't found anything that explains this particular case. Will we get any power advantage from putting the M4 into STOP2 even if the M0 needs to keep somewhat active? What kind of power consumption should we expect?
Cheers
2021-08-25 09:04 AM
Perhaps you are still missing the crux of the question. Note that the title of the question says 'without 32KHz crystal.' This refers to the LSE which is 32KHz. LSE is not requires to use BLE in the STM32WB. The MCU permits wake-up of the radio using HSE, but that means that the HSE cannot be put to sleep. The LSE is necessary to put the MCU into any low-power state below sleep as is explained by the quote above. We don't use the RTC and it isn't necessary for keeping time.
Cheers
2021-08-25 11:01 AM
OK ! Back to the questions then
1) Yes you can put the M4 into stop2 (CSTOP) while waiting for a BLE connect event. The M4 core indeed cab be awakened by an event generated from the M0+ core. The M0+ goes in low-power state depending on the RF activity. In between 2 BLE events once the RF block finishes its activity, the M0+ core enters CSTOP mode when the LSE clock is present leading to a full STOP2 state for the system.
But the M0+ core only enter SLEEP mode when the LSE clock is not used and HSE/1024 is used instead.
2) The M0+ enters sleep mode switching from HSE to HSE/1024 to keep the ability to wake up the RF block.
For sure putting the M4 core in low power mode when there is no other activity than waiting for the next RF event is a gain for the power consumption level. But in that case, it won’t be a real STOP2 mode as the M0+ core would be only in sleep mode.