Flash status register CFGBSY bit is always set on init

[YWor.1]

Hi.

I can see that CFGBSY bit is set and reset in some MX peripheral init functions, but the main problem is that it stays set after MX_TIM1_Init and it locks my flash for any operation.

Did anybody saw this kind of problem?

Any help will be appreciated.

Thanks.

[YWor.1]

I think I have found the problem. It doesn't happens because of any peripheral or cube initialization, it happens when CPU2 get into hard fault.

https://community.st.com/s/question/0D53W000024XBqLSAW/stm32wb55-cpu2-hardfault-for-unknown-reason

Attached post for more information.