cancel
Showing results for 
Search instead for 
Did you mean: 

Disabling IWDG In Standby

TWood.4
Associate II

I'm using a WB55 with IWDG enabled. 

I want to disable The IWDG when the device is in Standby mode. 

I have cleared the IWDGSTDBY bit using STM32CubeProgrammer, but I still get resets from the IWDG.

What am I doing wrong?

 

1 ACCEPTED SOLUTION

Accepted Solutions

Ah OK. RM0434 Rev 12 (WB55 Reference Manual) Says on P164 : 

Independent watchdog (IWDG): the IWDG is started by writing to its Key register or by
hardware option. Once started it cannot be stopped except by a Reset.

View solution in original post

8 REPLIES 8
Issamos
Lead II

Hello @TWood.4 

I think you should to write 0 to the IWDG_STDBY bit of the register Flash memory option register (FLASH_OPTR) to freeze the IWDG counter in Standby mode. And then write 1 to the nRST_STDBY bit of the register Flash memory option register (FLASH_OPTR) to stop resetting during Standby mode.

Best regards.

II

Those are the settings I currently have.

TWood.4
Associate II

I have tried both STOP and STANDBY modes with the IWDGSTOP and IWDG_STDBY bits cleared in the flash option bytes register. Reading back the register at 0x1FFF8000 gives 0x39F9F1AA - which confirms that both bits are cleared. (Table 9 from WB55 reference Manual shown below)

TWood4_0-1695287291431.png

 

I also explicitly clear the DBG_SLEEP, DBG_STOP and DBG_STANDBY bits in DBGMCU->CR

TWood4_1-1695289000983.png

I'm running out of ideas here.

Any suggestions?

 

 

Ah OK. RM0434 Rev 12 (WB55 Reference Manual) Says on P164 : 

Independent watchdog (IWDG): the IWDG is started by writing to its Key register or by
hardware option. Once started it cannot be stopped except by a Reset.

ASimo.3
Associate III

I felt I should make a post for anyone who found their way here like I did.

I am working with an STM32U575 and was hoping to stop the IWDG during stop 2 mode.  It is indeed impossible to stop the IWDG once started.  There is lore of some register settings in flash that allow the IWDG to be paused during a stop mode, but I had no success.

	FLASH_OBProgramInitTypeDef pOBInit;

	//set the timer to freeze when the MCU goes into stop mode
	HAL_FLASH_Unlock();

	 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTWERR);  //FLASH_FLAG_OPTVERR); // Clear the FLASH's pending flags. FLASH_FLAG_ALL_ERRORS FLASH_FLAG_OPERR

	 HAL_FLASH_OB_Unlock();

	 HAL_FLASHEx_OBGetConfig(&pOBInit); // Get the Option bytes configuration.
	 pOBInit.OptionType |= OPTIONBYTE_USER;
	 pOBInit.USERType |= OB_USER_IWDG_STOP;
	 pOBInit.USERConfig = OB_IWDG_STOP_FREEZE;	//FLASH_OB_USER_IWDG_STOP
	 HAL_FLASHEx_OBProgram(&pOBInit);
	 
	 HAL_FLASH_OB_Lock();
	 HAL_FLASH_Lock();

 

Instead Here is what I did to keep the IWDG from resetting the chip in stop2;

Setup LPTIM1 to refresh the watchdog during stop 2,  

static void MX_LPTIM1_Init(void)
{
  hlptim1.Instance = LPTIM1;
  hlptim1.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
  hlptim1.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV32;
  hlptim1.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
  hlptim1.Init.Period = LPTIME_SEC * 1024;
  hlptim1.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
  hlptim1.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
  hlptim1.Init.Input1Source = LPTIM_INPUT1SOURCE_GPIO;
  hlptim1.Init.Input2Source = LPTIM_INPUT2SOURCE_GPIO;
  hlptim1.Init.RepetitionCounter = 0;
  if (HAL_LPTIM_Init(&hlptim1) != HAL_OK)
  {
    Error_Handler();
  }
   HAL_NVIC_SetPriority(LPTIM1_IRQn, 4, 0);
   HAL_NVIC_EnableIRQ(LPTIM1_IRQn);
   __HAL_RCC_LPTIM1_CLKAM_ENABLE(); //lets the LPtimer run in stop2
}

 

Then before I go to stop2 I start the LP timer

   HAL_LPTIM_Counter_Start_IT(&hlptim1); //10sec timer (setup in cubeMX)

Finally in the timer callback

void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
{
    HAL_IWDG_Refresh(&hiwdg);
}

 

 

PS:  the lack of the stop or freeze wdt in low power modes is frustrating ST!

 

I am confused by your post, because IWDSTBY and IWDGSTOP do exist for all low power STM32 devices (logic is inverted, so you need to set them to zero to get frozen IWDG in Standby and Stop). Do you say that they are not working as intended? That would be a big errata, especially since it would have been an issue for several generations of chips now.
Of course, and I think this is the misunderstanding from the base post, those options only mean the counter is frozen while you are in Standby or Stop, you still need to retrigger as before once you left the stop mode.

Personally I don't like watchdogs which just run sometimes, since you can also easily get stuck in an indefinite stop or standby mode. For lowest consumption (since RTC is running anyway) I use the RTC wakeup to retrigger the watchdog. It is checked first thing at system init, and if the only reason to wake up from standby was the RTC, the system is send back to standby even before RAM was completely reinitialized.

I don't have any more time to put to this, and I have my solution.  My requirements were not for regular sleep cycles but a special case where I need it to basically be off.  However, I did revisit it a bit today.  I used the STM demo for the IWDG on the Nucleo U575ZI. (Originally, I was working on my custom PCBA.)  I modified it to go into STOP2 after a couple loops.  the WDT still runs in STOP2 and will reset the chip no matter what I do.  If you have some example code for me it would be appreciated, otherwise I'm moving on.

I can only reiterate:

"I am confused by your post, because IWDSTBY and IWDGSTOP do exist for all low power STM32 devices (logic is inverted, so you need to set them to zero to get frozen IWDG in Standby and Stop)."

The code above sets the IWDGSTOP bit in the option byte, but you actually need to clear it to get the freeze.