2025-10-06 7:58 AM - edited 2025-10-06 1:08 PM
I am using the LoRaWAN end-node dual-core demo on an STM32WL5M. I noticed the RAM_SHARED section in the .LD files of each core project points to different addresses, one to 0x20008000 and one to 0x20009000. Is this a potential issue?
