Is Stm32f769IIT feasible with ST7701 and NT35510MH LCD IC driver?

[MYous.8]

I'm using DSI in video mode +LTDC in Stm32f769IITX to interface with LCD driver "ST7701"

and i am facing problems to display an image even i followed the manufacturer initialization sequence. so, i contacted with the the "ST7701" supplier which said that "STM mcu is not compatible with lcd driver "ST7701" ,"NT35510MH" as well.

[JMD]

Hello,

@ari_v2​ I have an issue (artefact) and enabling double buffering is not enougth.

I reduce my pixel clock (and adapt my LTDC).

My pixel clock is now 13.71 Mhz with and external SDRAM without any issue.

So I confirm to everyone that ST7701 work well on STM32F779 and STM32F769.

 i contacted with the the "ST7701" supplier which said that "STM mcu is not compatible with lcd driver "ST7701" ,"NT35510MH" as well.

This affirmation is clearly wrong

Best regards.

Julien.

[ari_v2]

Hi, Thanks. good news. Could you please share the mxcube file and relevant files for lcd setup? I use the stm32f469. Do you think performance could differ in the lcd aspect? Thanks for update. Ari נשלח מסמ�?רטפון ה-Samsung Galaxy שלי. -------- הודעה מקורית -------- מ�?ת: ST Community ת�?ריך: 20/08/2021 19:01 (GMT+02:00) �?ל: Ari Vigdor נוש�?: JMD mentioned you in an answer to: Is Stm32f769IIT feasible with ST7701 and NT35510MH LCD IC driver? Hello, @ari_v2​ I have an issue (artefact) and enabling double buffering is not enougth. I reduce my pixel clock (and adapt my LTDC). My pixel clock is now 13.71 Mhz with and external SDRAM without any issue. So I confirm to everyone that ST7701 work well on STM32F779 and STM32F769. i contacted with the the "ST7701" supplier which said that "STM mcu is not compatible with lcd driver "ST7701" ,"NT35510MH" as well. Best regards. Julien. [https://community.st.com/img/userprofile/default_profile_45_v2.png?fromEmail=1]<> JMD<> (Community Member) Hello, @ari_v2<> (Community Member)​ I have an issue (artefact) and enabling double buffering is not enougth. I reduce my pixel clock (and adapt my LTDC). My pixel clock is now 13.71 Mhz with and external SDRAM without any issue. So I confirm to everyone that ST7701 work well on STM32F779 and STM32F769. i contacted with the the "ST7701" supplier which said that "STM mcu is not compatible with lcd driver "ST7701" ,"NT35510MH" as well. Best regards. Julien. View/Answer<> or reply to this email Replying to [https://community.st.com/ncsphoto/nB_Ih0Cft57DmeO0Dir2cSDx1zndr5T61w5O7UWyoc9t3lU2Z2P0DiDB9zHVIh7A?fromEmail=1]<> MYous.8<> (Community Member) asked a question. Wednesday, November 18, 2020 2:20 PM<> Is Stm32f769IIT feasible with ST7701 and NT35510MH LCD IC driver? I'm using DSI in video mode +LTDC in Stm32f769IITX to interface with LCD driver "ST7701" and i am facing problems to display an image even i followed the manufacturer initialization sequence. so, i contacted with the the "ST7701" supplier which said that "STM mcu is not compatible with lcd driver "ST7701" ,"NT35510MH" as well. [https://community.st.com/img/userprofile/default_profile_45_v2.png?fromEmail=1]<> JMD<> (Community Member) Hello, @ari_v2<> (Community Member)​ I have an issue (artefact) and enabling double buffering is not enougth. I reduce my pixel clock (and adapt my LTDC). My pixel clock is now 13.71 Mhz with and external SDRAM without any issue. So I confirm to everyone that ST7701 work well on STM32F779 and STM32F769. i contacted with the the "ST7701" supplier which said that "STM mcu is not compatible with lcd driver "ST7701" ,"NT35510MH" as well. Best regards. Julien. Friday, August 20, 2021 7:01 PM<> You're receiving emails when someone "Mentions me in a comment." To change or turn off ST Community email, log in<> as ari_v@otiglobal.com.st. STMicroelectronics N.V. [ST Community]

[JMD]

Hello,

I don't use CUBE MX for LTDC I generate my project with LTDC to enable TouchGFX but timing are wrong in cubemx.

But you can see here revelant code.

You need to adapt your Pixel clock with your screen resolution to have the frame rate expected.

The LCD_ST7701_Init() function is your function with adapted value for my specific screen.

Please find attached full project with cubeMx, CubeIde Project and TouchGfxProject.

Best regards,

Julien.

void LCD_Init(){
	DSI_PLLInitTypeDef dsiPllInit;
	RCC_PeriphCLKInitTypeDef  PeriphClkInitStruct;
	DSI_VidCfgTypeDef VidCfg = {0};
 
	//uint32_t LcdClock  = 27429; /*!< LcdClk = 27429 kHz => To fast more than 120 FPS with 480*480 screen*/
	uint32_t LcdClock  = 13714; /*!< LcdClk = 13714 kHz */
 
 
	uint32_t laneByteClk_kHz = 62500; /* 500 MHz / 8 = 62.5 MHz = 62500 kHz */
	uint32_t                   VSA = 1; /*!< Vertical start active time in units of lines */
	uint32_t                   VBP = 15; /*!< Vertical Back Porch time in units of lines */
	uint32_t                   VFP = 16; /*!< Vertical Front Porch time in units of lines */
	uint32_t                   VACT = GUI_HEIGHT ; /*!< Vertical Active time in units of lines = imageSize Y in pixels to display */
	uint32_t                   HSA = 2; /*!< Horizontal start active time in units of lcdClk */
	uint32_t                   HBP = 34; /*!< Horizontal Back Porch time in units of lcdClk */
	uint32_t                   HFP = 34; /*!< Horizontal Front Porch time in units of lcdClk */
	uint32_t                   HACT = GUI_WIDTH; /*!< Horizontal Active time in units of lcdClk = imageSize X in pixels to display */
 
	/* Toggle Hardware Reset of the DSI LCD using
	* its XRES signal (active low) */
	Lcd_Reset();
 
	/* Call first MSP Initialize only in case of first initialization
	* This will set IP blocks LTDC, DSI and DMA2D
	* - out of reset
	* - clocked
	* - NVIC IRQ related to IP blocks enabled
	*/
	LCD_MspInit();
 
	/*************************DSI Initialization***********************************/
 
	/* Base address of DSI Host/Wrapper registers to be set before calling De-Init */
	hdsi.Instance = DSI;
 
	HAL_DSI_DeInit(&(hdsi));
 
	dsiPllInit.PLLNDIV  = 100;
	dsiPllInit.PLLIDF   = DSI_PLL_IN_DIV5;
	dsiPllInit.PLLODF  = DSI_PLL_OUT_DIV1;
 
	/* Set number of Lanes */
	hdsi.Init.NumberOfLanes = DSI_TWO_DATA_LANES;
 
	/* TXEscapeCkdiv = f(LaneByteClk)/15.62 = 4 */
	hdsi.Init.TXEscapeCkdiv = 4;
	//hdsi.Init.TXEscapeCkdiv = laneByteClk_kHz/15620;
 
	HAL_DSI_Init(&(hdsi), &(dsiPllInit));
 
	//To allow read
	//HAL_DSI_ConfigFlowControl(&hdsi, DSI_FLOW_CONTROL_BTA);
 
 
	VidCfg.VirtualChannelID = 0;
	VidCfg.ColorCoding = DSI_RGB888;
 
	//probably not used
	VidCfg.VSPolarity = DSI_HSYNC_ACTIVE_HIGH;
	VidCfg.HSPolarity = DSI_VSYNC_ACTIVE_HIGH;
	VidCfg.DEPolarity = DSI_DATA_ENABLE_ACTIVE_HIGH;
 
	VidCfg.LooselyPacked = DSI_LOOSELY_PACKED_DISABLE;
	VidCfg.Mode = DSI_VID_MODE_BURST; /* Mode Video burst ie : one LgP per line */
	VidCfg.NullPacketSize = 0; //0xFFF;
	VidCfg.NumberOfChunks = 0;
 
 
	VidCfg.PacketSize                = HACT; /* Value depending on display orientation choice portrait/landscape */
	VidCfg.HorizontalSyncActive      = (HSA * laneByteClk_kHz)/LcdClock;
	VidCfg.HorizontalBackPorch       = (HBP * laneByteClk_kHz)/LcdClock;
	VidCfg.HorizontalLine            = ((HACT + HSA + HBP + HFP) * laneByteClk_kHz)/LcdClock; /* Value depending on display orientation choice portrait/landscape */
	VidCfg.VerticalSyncActive        = VSA;
	VidCfg.VerticalBackPorch         = VBP;
	VidCfg.VerticalFrontPorch        = VFP;
	VidCfg.VerticalActive            = VACT; /* Value depending on display orientation choice portrait/landscape */
 
	/* Enable or disable sending LP command while streaming is active in video mode */
	VidCfg.LPCommandEnable = DSI_LP_COMMAND_ENABLE; /* Enable sending commands in mode LP (Low Power) */
 
	/* Largest packet size possible to transmit in LP mode in VSA, VBP, VFP regions */
	/* Only useful when sending LP packets is allowed while streaming is active in video mode */
	VidCfg.LPLargestPacketSize = 16;
 
	/* Largest packet size possible to transmit in LP mode in HFP region during VACT period */
	/* Only useful when sending LP packets is allowed while streaming is active in video mode */
	VidCfg.LPVACTLargestPacketSize = 0;
 
	/* Specify for each region of the video frame, if the transmission of command in LP mode is allowed in this region */
	/* while streaming is active in video mode                                                                         */
	VidCfg.LPHorizontalFrontPorchEnable = DSI_LP_HFP_ENABLE;   /* Allow sending LP commands during HFP period */
	VidCfg.LPHorizontalBackPorchEnable  = DSI_LP_HBP_ENABLE;   /* Allow sending LP commands during HBP period */
	VidCfg.LPVerticalActiveEnable = DSI_LP_VACT_ENABLE;  /* Allow sending LP commands during VACT period */
	VidCfg.LPVerticalFrontPorchEnable = DSI_LP_VFP_ENABLE;   /* Allow sending LP commands during VFP period */
	VidCfg.LPVerticalBackPorchEnable = DSI_LP_VBP_ENABLE;   /* Allow sending LP commands during VBP period */
	VidCfg.LPVerticalSyncActiveEnable = DSI_LP_VSYNC_ENABLE; /* Allow sending LP commands during VSync = VSA period */
	VidCfg.FrameBTAAcknowledgeEnable = DSI_FBTAA_ENABLE;
 
	/* Configure DSI Video mode timings with settings set above */
	HAL_DSI_ConfigVideoMode(&hdsi, &VidCfg);
	HAL_DSI_SetGenericVCID(&hdsi, 0);
 
	/*************************End DSI Initialization*******************************/
 
 
	/************************LTDC Initialization***********************************/
 
	/* Timing Configuration */
	hltdc.Init.HorizontalSync = (HSA - 1);
	hltdc.Init.AccumulatedHBP = (HSA + HBP - 1);
	hltdc.Init.AccumulatedActiveW = (GUI_WIDTH + HSA + HBP - 1);
	hltdc.Init.TotalWidth = (GUI_WIDTH + HSA + HBP + HFP - 1);
 
	/* Initialize the LCD pixel width and pixel height */
	hltdc.LayerCfg->ImageWidth  = GUI_WIDTH;
	hltdc.LayerCfg->ImageHeight = GUI_HEIGHT;
 
	/** LCD clock configuration
	* Note: The following values should not be changed as the PLLSAI is also used
	*      to clock the USB FS
	* PLLSAI_VCO Input = HSE_VALUE/PLL_M = 1 Mhz
	* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN = 384 Mhz
	* PLLLCDCLK = PLLSAI_VCO Output/PLLSAIR = 384 MHz / 7 = 54.85 MHz
	*
	*
	* LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_2 = 54.85 MHz / 2 = 27.429 MHz  => Too fast MCU doesn't have time too draw between frame
	* LTDC clock frequency = PLLLCDCLK / LTDC_PLLSAI_DIVR_4 = 54.85 MHz / 4 = 13.71 MHz
	*/
	PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
	PeriphClkInitStruct.PLLSAI.PLLSAIN = 384;
	PeriphClkInitStruct.PLLSAI.PLLSAIR = 7;
	PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_4;
	HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
 
	/* Background value */
	hltdc.Init.Backcolor.Blue = 0;
	hltdc.Init.Backcolor.Green = 0;
	hltdc.Init.Backcolor.Red = 0;
	hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
	hltdc.Instance = LTDC;
 
	/* Get LTDC Configuration from DSI Configuration */
	HAL_LTDC_StructInitFromVideoConfig(&hltdc, &VidCfg);
 
	/* Initialize the LTDC */
	HAL_LTDC_Init(&hltdc);
 
	/* Enable the DSI host and wrapper after the LTDC initialization
	 To avoid any synchronization issue, the DSI shall be started after enabling the LTDC */
	HAL_DSI_Start(&hdsi);
 
	LCD_ST7701_Init();
 
	//To test LTDC
	//HAL_DSI_PatternGeneratorStart(&hdsi, 0, 0);
}