2022-01-14 02:27 AM
// Disable spi peripherals
__HAL_SPI_DISABLE(&hspi1);
__HAL_DMA_DISABLE(&hdma_spi1_tx);
CLEAR_BIT(hspi1.Instance->CR2, SPI_CR2_LDMATX);
/* Clear all flags */
__HAL_DMA_CLEAR_FLAG(&hdma_spi1_tx, (DMA_FLAG_GI1 << (hdma_spi1_tx.ChannelIndex & 0x1cU)));
/* Configure DMA Channel data length */
hdma_spi1_tx.Instance->CNDTR = sizex*sizey;
/* Configure DMA Channel destination address */
hdma_spi1_tx.Instance->CPAR = (uint32_t)&hspi1.Instance->DR;
/* Configure DMA Channel source address */
hdma_spi1_tx.Instance->CMAR = (uint32_t)bitmap;
/* Disable the transfer half complete interrupt */
__HAL_DMA_DISABLE_IT(&hdma_spi1_tx, DMA_IT_HT);
/* Enable the transfer complete interrupt */
__HAL_DMA_ENABLE_IT(&hdma_spi1_tx, (DMA_IT_TC | DMA_IT_TE));
/* Enable the Peripherals */
__HAL_DMA_ENABLE(&hdma_spi1_tx);
__HAL_SPI_ENABLE(&hspi1);
/* Enable Tx DMA Request */
SET_BIT(hspi1.Instance->CR2, SPI_CR2_TXDMAEN);
Here part from void Display_Bitmap(
produce errors...
../Core/Src/UNIMM_DisplayDriver.c: In function 'Display_Bitmap':
../Core/Src/UNIMM_DisplayDriver.c:139:34: error: 'SPI_CR2_LDMATX' undeclared (first use in this function); did you mean 'SPI_CR2_TXDMAEN'?
139 | CLEAR_BIT(hspi1.Instance->CR2, SPI_CR2_LDMATX);
| ^~~~~~~~~~~~~~
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:214:43: note: in definition of macro 'CLEAR_BIT'
214 | #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
| ^~~
../Core/Src/UNIMM_DisplayDriver.c:139:34: note: each undeclared identifier is reported only once for each function it appears in
139 | CLEAR_BIT(hspi1.Instance->CR2, SPI_CR2_LDMATX);
| ^~~~~~~~~~~~~~
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:214:43: note: in definition of macro 'CLEAR_BIT'
214 | #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
| ^~~
In file included from ../Core/Inc/stm32f4xx_hal_conf.h:286,
from ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:30,
from ../Core/Inc/main.h:31,
from ../Core/Src/UNIMM_DisplayDriver.c:1:
../Core/Src/UNIMM_DisplayDriver.c:142:40: error: 'DMA_FLAG_GI1' undeclared (first use in this function); did you mean 'DMA_FLAG_FEIF1_5'?
142 | __HAL_DMA_CLEAR_FLAG(&hdma_spi1_tx, (DMA_FLAG_GI1 << (hdma_spi1_tx.ChannelIndex & 0x1cU)));
| ^~~~~~~~~~~~
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:561:81: note: in definition of macro '__HAL_DMA_CLEAR_FLAG'
561 | (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\
| ^~~~~~~~
../Core/Src/UNIMM_DisplayDriver.c:142:69: error: 'DMA_HandleTypeDef' {aka 'struct __DMA_HandleTypeDef'} has no member named 'ChannelIndex'
142 | __HAL_DMA_CLEAR_FLAG(&hdma_spi1_tx, (DMA_FLAG_GI1 << (hdma_spi1_tx.ChannelIndex & 0x1cU)));
| ^
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:561:81: note: in definition of macro '__HAL_DMA_CLEAR_FLAG'
561 | (((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA2_Stream3)? (DMA2->HIFCR = (__FLAG__)) :\
| ^~~~~~~~
../Core/Src/UNIMM_DisplayDriver.c:142:69: error: 'DMA_HandleTypeDef' {aka 'struct __DMA_HandleTypeDef'} has no member named 'ChannelIndex'
142 | __HAL_DMA_CLEAR_FLAG(&hdma_spi1_tx, (DMA_FLAG_GI1 << (hdma_spi1_tx.ChannelIndex & 0x1cU)));
| ^
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:562:81: note: in definition of macro '__HAL_DMA_CLEAR_FLAG'
562 | ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream7)? (DMA2->LIFCR = (__FLAG__)) :\
| ^~~~~~~~
../Core/Src/UNIMM_DisplayDriver.c:142:69: error: 'DMA_HandleTypeDef' {aka 'struct __DMA_HandleTypeDef'} has no member named 'ChannelIndex'
142 | __HAL_DMA_CLEAR_FLAG(&hdma_spi1_tx, (DMA_FLAG_GI1 << (hdma_spi1_tx.ChannelIndex & 0x1cU)));
| ^
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:563:81: note: in definition of macro '__HAL_DMA_CLEAR_FLAG'
563 | ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
| ^~~~~~~~
../Core/Src/UNIMM_DisplayDriver.c:142:69: error: 'DMA_HandleTypeDef' {aka 'struct __DMA_HandleTypeDef'} has no member named 'ChannelIndex'
142 | __HAL_DMA_CLEAR_FLAG(&hdma_spi1_tx, (DMA_FLAG_GI1 << (hdma_spi1_tx.ChannelIndex & 0x1cU)));
| ^
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:563:110: note: in definition of macro '__HAL_DMA_CLEAR_FLAG'
563 | ((uint32_t)((__HANDLE__)->Instance) > (uint32_t)DMA1_Stream3)? (DMA1->HIFCR = (__FLAG__)) : (DMA1->LIFCR = (__FLAG__)))
| ^~~~~~~~
../Core/Src/UNIMM_DisplayDriver.c:145:26: error: 'DMA_Stream_TypeDef' {aka 'struct <anonymous>'} has no member named 'CNDTR'; did you mean 'NDTR'?
145 | hdma_spi1_tx.Instance->CNDTR = sizex*sizey;
| ^~~~~
| NDTR
../Core/Src/UNIMM_DisplayDriver.c:147:26: error: 'DMA_Stream_TypeDef' {aka 'struct <anonymous>'} has no member named 'CPAR'; did you mean 'PAR'?
147 | hdma_spi1_tx.Instance->CPAR = (uint32_t)&hspi1.Instance->DR;
| ^~~~
| PAR
../Core/Src/UNIMM_DisplayDriver.c:150:26: error: 'DMA_Stream_TypeDef' {aka 'struct <anonymous>'} has no member named 'CMAR'; did you mean 'CR'?
150 | hdma_spi1_tx.Instance->CMAR = (uint32_t)bitmap;
| ^~~~
| CR
??? SPI_CR2_LDMATX is in F446 ???
howto replace this code with normal _DMA call?
2022-01-15 12:17 PM
I extend my question . Exist an explain diagram for this G071 example? Code is little chaos and handle partial buffering isnt clean. How work TE interrupt and timer 6 ?
Why some lines in code is commented ? And we can continue ...
2022-01-19 05:30 AM
I replace this chaos
volatile uint8_t IsTransmittingBlock_;
void UNIMM_dmacallback(void)
{
IsTransmittingBlock_ = 0;
DisplayDriver_TransferCompleteCallback();
}
void Display_Bitmap(const uint16_t *bitmap, uint16_t posx, uint16_t posy, uint16_t sizex, uint16_t sizey)
{
IsTransmittingBlock_ = 1;
GC9A01A_SetWindow(posx, posy, posx+sizex-1, posy+sizey-1);
HAL_GPIO_WritePin(LCD_DC_GPIO_Port, LCD_DC_Pin, GPIO_PIN_SET);
SPI_send_dma(GC9A01A_SPI_periph, 1, (uint8_t *)bitmap, sizex*sizey, UNIMM_dmacallback);
}