How to limit the transfer speed from the internal ram to the display when using touchgfx but without reducing the AXI bus frequency? The controller is STM32H743

[waclawek.jan · Accepted solution]

You mean, reducing the pixel clock? It's ltdc_ker_ck, and that is the R output of PLL3 see RCC chapter.

So you have to change the R output of PLL3.

JW

[MSale.1]

No not the pixel clock. i mean the speed of the bus it self for example in stm32h743 its 240Mhz at max frequency. i need to reduce it without affect the AHB2 bus

[berendi]

Why? What problem would that solve?

[Tesla DeLorean]

Yes the pixel clock, and the clocks the LTDC is using to drive the pacing of data fetches from the memory, it is a synchronous machine, want it slower, gear things down. Play with FIFO and BURST type settings to control how much data pulls at each interaction.

Don't have the bandwidth, then you're going to have to come up with a different approach.

[MSale.1]

@Community member​ 

Ok Thnx!

[MSale.1]

@Community member​ 

Thnx

[MSale.1]

@Community member​ 

I tried to find where i can disable the FIFO for specific layer but could not found any thing neither in datasheet or reference manual?

Do you know where can i find it?