2022-03-18 04:46 AM
You can found below a extract of my linker script:
MEMORY
{
D1_CODE_RAM (xrx) : ORIGIN = 0x24070000, LENGTH = 64K
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K
NVRAM (rx) : ORIGIN = 0x8020000, LENGTH = 64K
}
.ram_code_load () :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.ram_code_load)
*(.ram_code_load*)
*RestApiServer.o (.text .text*)
*Cryptographic_CM7.a:*(.text .text*)
KEEP(*(.ram_code_load))
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >D1_CODE_RAM AT> NVRAM
What I expect is to found into my .map file the Cryptographic_CM7 .text code placed at 0x8020000 as it's done with RestApiServer.o code.
What I get is the Cryptographic_CM7 library .text code placed at 0x8000000...
Until now I had follow this PDF as ressources whitout any sucess. https://www.st.com/resource/en/application_note/an4296-use-stm32f3stm32g4-ccm-sram-with-iar-embedded-workbench-keil-mdkarm-stmicroelectronics-stm32cubeide-and-other-gnubased-toolchains-stmicroelectronics.pdf
Could someone provide me some help ?
Solved! Go to Solution.
2022-04-14 08:00 AM
Finally I manage to understand what was happening,
The code as shared is working properly, but in the full file I do have between line 6 and 8 (in the example above) the following line:
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
. = ALIGN(4);
} >FLASH
Since this line has been defined before the definition of the .ram_load_code section all the .text has been located into the FLASH region and not the NVRAM as wanted.
2022-04-14 08:00 AM
Finally I manage to understand what was happening,
The code as shared is working properly, but in the full file I do have between line 6 and 8 (in the example above) the following line:
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
. = ALIGN(4);
} >FLASH
Since this line has been defined before the definition of the .ram_load_code section all the .text has been located into the FLASH region and not the NVRAM as wanted.