cancel
Showing results for 
Search instead for 
Did you mean: 

Zener Diode from 5V rail to VDD across the LDO?

DJC
Senior

In AN4899 it specifies that one should add a zener diode from the 5V rail to the 3.3V rail in order to have complete safety when using FT pins with 5V pull ups.

Does anyone know what the specifications of the Zener diode should be (currents, resistances, etc) and the associated resistor?

Is anyone actually doing this? I can't find examples of this anywhere. I've found a few Nucleo board schematics that don't seem to use it either.

I'm using 10k pullups on a STM32L431CBT6 with a LD3985M33R as my LDO.

0693W00000Dnnx7QAB.png 

p.s. this is an extension to this original question, but this specific part of putting a zener diode is something that is still unanswered.

1 ACCEPTED SOLUTION

Accepted Solutions
TDK
Guru

Just guessing here.

I would expect the diode to be there in order to prevent the condition that 5V is going into a pin when 3V3 is unpowered. So any breakdown voltage below 4V would work. And it needs to be at least 1.7 to avoid putting current into 3.3V from a 5V rail. So anywhere between 1.7V and 4V, preferably in the middle somewhere.

However, any LDO's I've worked with have such a fast response time that the zener diode would never carry current in this direction, so I'm not sure why they suggest it. I guess it may happen if you had a ton of capacitance on 3.3V compared to 5V.

In your case, you've measured the rails during startup and would be able to verify the diode would never carry any significant current.

If you feel a post has answered your question, please click "Accept as Solution".

View solution in original post

2 REPLIES 2
TDK
Guru

Just guessing here.

I would expect the diode to be there in order to prevent the condition that 5V is going into a pin when 3V3 is unpowered. So any breakdown voltage below 4V would work. And it needs to be at least 1.7 to avoid putting current into 3.3V from a 5V rail. So anywhere between 1.7V and 4V, preferably in the middle somewhere.

However, any LDO's I've worked with have such a fast response time that the zener diode would never carry current in this direction, so I'm not sure why they suggest it. I guess it may happen if you had a ton of capacitance on 3.3V compared to 5V.

In your case, you've measured the rails during startup and would be able to verify the diode would never carry any significant current.

If you feel a post has answered your question, please click "Accept as Solution".

Thanks.

I find it really curious about this document is that this is done on I2C.

I2C is bi-directional and therefor there will be times when (at least) SDA needs to be configured as output with open drain.

However there are SO many places where people say 5V tolerance is "input only".

Including in this same document (AN4899 5.2.2) it says "However, a GPIO is five-volt tolerant only in input mode".

As far as I can tell. Its perfectly fine to drive 5V logic like this as long as you don't break any sink current limits on the pins.

I've tested it for months, and it works fine and I hear of plenty of others using this in their designs. It would be good to know once-and-for-all if its fine.

Perhaps I should just ask this as a yet-another community question and get it really clarified?