XiP STM32H750 changing flash latency for HAL_RCC_ClockConfig

[KKiec.1]

Hi, on my board i`m running bootloader in internal flash of stm32h750 together with 2 QSPI NOR chips that store main program.

Bootloader starts and jumps to main program in QSPI, however

it get`s tricky when this function is called:

SystemClock_Config();

Inside of it we can see HAL_RCC_ClockConfig function that causes hard fault if FLASH_LATENCY is set to default value (4). By trial and error I`ve figured out that it works with values that are >= 7.

void SystemClock_Config(void)
{
.
.
.
 
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
  {
    Error_Handler();
  }
}

Now the problem is that since HAL_RCC_ClockConfig function is autogenerated I would need to update this setting everytime I make some changes in .ioc file, setting it in user code won`t help because mentioned above function sets it back to default value.

HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
{
.
.
.
 
/* Increasing the CPU frequency */
  if(FLatency > __HAL_FLASH_GET_LATENCY())
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 
    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if(__HAL_FLASH_GET_LATENCY() != FLatency)
    {
      return HAL_ERROR;
    }
 
  }
.
.
.
 
  /* Decreasing the number of wait states because of lower CPU frequency */
  if(FLatency < __HAL_FLASH_GET_LATENCY())
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 
    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if(__HAL_FLASH_GET_LATENCY() != FLatency)
    {
      return HAL_ERROR;
    }
 }
}

Any Ideas how I can solve this?

[KKiec.1]

Silly me... I don`t know if I should delete this question after finding answer but in case it stays here, this is the workaround (put in user code section):

__HAL_FLASH_SET_LATENCY(FLASH_LATENCY_7);
#define FLASH_LATENCY_4 (0x00000007UL)

[Pavel A.]

> #define FLASH_LATENCY_4 (0x00000007UL)

Wow.

Is your H750 revision Y? What is the system clock frequency?

[KKiec.1 · Accepted solution]

It`s rev V and sysclock is cranked up to maximum of 480MHz.

Also I must admit that I did draw conclusions too quickly. For a few times code above worked but when I got back to work on monday everything was failing at random code fragments. I tracked down the problem in SCB register and it turned out to be "Imprecise data bus", then I`ve changed MPU settings and saw that instructions with random value were given by the QSPI.

It turned out to be problem (bug probably?) with QSPI prescaler. If it is set to 0 (precaller = 1), then situation described above happens.

I`ve also tested for different scenarios:

1.

Clock Prescaler = 0

QSPI clock from PLL = 100MHz

Random Errors

2.

Clock Prescaler = 1

QSPI clock from PLL = 100MHz

Working

3.

Clock Prescaler = 0

QSPI clock from PLL = 50MHz

Random Errors

4.

Clock Prescaler = 1

QSPI clock from PLL = 200MHz

Working

This is the working setup:

Memory that I use: MX25L51245GZ2I-10G in dual flash setup.

While programming it, I`ve encountered a few more bugs that should be investigated but that`s for another topic.