Wrong values on ADC without debugger but OK with debugger

[srikrishnan]

Posted on March 31, 2017 at 23:59

I am using ADC1 in scan mode. When I run my code normally through the debugger, it works just fine. However, when I remove the debugger and directly run it, I am seeing extremely low voltages. What could possibly be the reason for this? Has anyone else seen this? I have compiler optimization turned off to ensure there isnt much of a difference due to compiler optimization. It does not happen on all boards and only on 10%. I have also tried slowing the ADC sample times to as low as possible(239.5 cycles). I normally run them on 1.5 on all boards and I am good (with and without debugger). I have also reviewed the board under a microscope and there is no hardware issue. FWIW, I am supposed to read 24V and I am reading 2.36V.

[antonius]

Posted on April 02, 2017 at 16:11

Is it ST-Link or J-Link ? I think, they supply a voltage to the board

[srikrishnan]

Posted on April 02, 2017 at 22:13

It is ST Link. So I guess the implied reason then is that when the debugger goes away, the MCU doesnt receive power? Then I am curious why the rest of the logic, other than ADC is able to function normally. Perhaps I should dig into this assumption too.

[srikrishnan]

Posted on April 02, 2017 at 22:15

Thanks Clive. Also, have I said thanks for all the wisdom you're able to share with us on these forums. I was going to bet that you were employed by ST. Good thing I didn't. I was going to see if there was something going on with the reset conditions that could possibly be affecting this.

[antonius]

Posted on April 02, 2017 at 23:58

It could be AVDD is connected / depends on ST-Link power supply, please

have a look on schematic to be sure.

[srikrishnan]

Posted on April 03, 2017 at 00:12

I know I am running out of options but I just had a fun Sunday evening at work probing away and all the VDDs seem to come up at the right voltages, with and without the debugger. I'm now left with the reset conditions. I find it hard to believe that the reset conditions might affect the ADCs but not other functionalities.

[antonius]

Posted on April 03, 2017 at 00:17

How about VREF, does it get a good feed voltage ? any leaking filter

capacitors ?

[antonius]

Posted on April 03, 2017 at 00:23

Sheet 3 of 6 STM32F4DISCOVERY Schematic for example, MB997.pdf that's

what I can see from here,

there's another possibility, that you need extra current for your

application, that's why the debugger needs to be connected ?

What's connected to ADC or what others peripheral are connected ? If

it's drawing a current too much, it'll not work properly I reckon

[srikrishnan]

Posted on April 03, 2017 at 00:31

The VREF- is connected to analog ground. I will probe VREF+ next. It's a little harder to get to it but its the next thing I am looking at.

[srikrishnan]

Posted on April 03, 2017 at 00:33

I cant say it with certainty but I doubt if I would be current starved. I am using the ADCs to monitor line voltages and the state of peripherals connected to them. Also it could potentially be a component issue but I doubt its a design issue since I dont see it in 9/10 boards.