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Wrong Reset Values ​​in ports A and B.

MMust.5
Senior II

0693W00000Nqno1QAB.pngSTM32F407

https://www.st.com/resource/en/reference_manual/dm00031020-stm32f405-415-stm32f407-417-stm32f427-437-and-stm32f429-439-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf

Why are there incorrect Reset Values ​​in ports A and B?

I erased the chip completely, pressed reset, the values remain the same.

When started in the "Connect under Reset" mode, the values ​​of the registers in ports A and B remain the same.

When debugging, I press Run.

Nothing depends on the code here, but here is my code:

#include "main.h"
int main(void)
{
RCC->AHB1ENR|=RCC_AHB1ENR_GPIODEN;
GPIOD->MODER|=1<<(2*12);
GPIOD->ODR=1<<12;
}
 

How to fix it?

1 ACCEPTED SOLUTION

Accepted Solutions

Registers values *are* set after system reset to their proper values, by hardware; it's only that the processor can't read them without enabling the clock in RCC.

JW

View solution in original post

5 REPLIES 5

You have to enable given GPIO's clock to be able to read out its registers properly. You can do it in the debugger "manually", too.

(I've already noticed this effect with GPIO and may need to correct my assertion that registers of peripherals which don't have enabled clocks in RM read as 0. OTOH, I've actually read this somewhere in ST's materials, although not specifically RM0090, may need to reinvestigate).

Btw. your program should end in an infinite loop.

JW

So?

RCC->AHB1ENR|=RCC_AHB1ENR_GPIOAEN;

I did it. Does not work.

Now the registers are correctly configured with the code that I wrote above.

RCC->AHB1ENR|=RCC_AHB1ENR_GPIOAEN;

Maybe I didn't notice last time, I don't know.

Strange, I've done this before too.

I probably checked the registers in the "Connect under Reset" mode. In this mode, the value of the registers does not change.

MMust.5
Senior II

That is, in order for the port to have standard values, then first I must enable the RCC bus for this port.

But it's strange why my SWD worked without the RCC bus enabled for port A.

This was not in the code RCC->AHB1ENR|=RCC_AHB1ENR_GPIOAEN;

but SWD worked.

Registers values *are* set after system reset to their proper values, by hardware; it's only that the processor can't read them without enabling the clock in RCC.

JW