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Why OTG_HS USB/USBX Host on STM32U5A9x just does not work?

TDJ
Senior III

While investigating for the firth evening in the row why OTH_HS USB on STM32U5A9x does not work I reviewed USB registers. There are quite few of them and in HAL some are them are named differently than in RM0456 (details here), but that is not the root problem.
According to RM0456, section 15.2.3 "Configuring the OTG_HS PHY (only for STM32U59x/5Ax/5Fx/5Gx)" the following register fields should be set:

  • SYSCFG.OTGHSPHYCR.CLKSEL (IP clock speed selection)
  • SYSCFG.OTGHSPHYTUNER2.COMPDISTUNE
  • SYSCFG.OTGHSPHYTUNER2.SQRXTUNE
  • then OTH_HS IP can be enabled by setting SYSCFG.OTGHSPHYCR.EN=1

I realized that after when MX_USB_OTG_HS_HCD_Init() was called, the above two register values had still zero values.

Within MX_USB_OTG_HS_HCD_Init() function SYSCFG.OTGHSPHYTUNER2.COMPDISTUNE and SYSCFG.OTGHSPHYTUNER2.SQRXTUNE are not set while they probably should be since the recommended values differ from default ones (RM0456, 15.3.13).
Certainly, setting SYSCFG.OTGHSPHYCR.CLKSEL to a non-zero default value is a must (RM0456, 15.3.12).

The above got me thinking. Was the RCC.APB3ENR.SYSCFGEN set in the first place? It turned out that it was not.
Probably this is another serious CubeMX bug. I seriously doubt anyone succeeded trying to configure USB on STM32U5A or STM32U59 with CubeMX yet. Was it ever tested?

In short: it seems that CubeMX generated code does not call HAL_SYSCFG_SetOTGPHYDisconnectThreshold() and HAL_SYSCFG_SetOTGPHYSquelchThreshold() while it should and does not enable APB3ENR.SYSCFGEN clock first.

9 REPLIES 9
Pavel A.
Evangelist III

#bugreport

Probably this is another serious CubeMX bug. I seriously doubt anyone succeeded trying to configure USB on STM32U5A or STM32U59 with CubeMX yet. Was it ever tested?

A good point. The examples usually (or often) are not created using the cube-generated code (can you guess why?) so the generated code is less tested and reliable in this respect. => Advice: always start with a ready example; only after getting it working generate your own with cube and use the former as reference.

TDK
Guru

Not many chips have an internal HS PHY. Previous to the STM32U5, only a few in the STM32F7 line had one. Historically, the robustness of the USB libraries has lagged behind the hardware significantly. They have improved over the years, but expect to go through growing pains when adopting the newest hardware.

The STM32U5 examples are a bit lacking in this department. If the peripherals are the same, you could likely take inspiration from the STM32F7 examples.

If you feel a post has answered your question, please click "Accept as Solution".
TDJ
Senior III

In plain English, USB and UCPD support in CubeMX looks to me like an early beta version which no one tested yet.

TDJ
Senior III

@Pavel A. I have tried available Ux_Host_xx examples first, but could not get any of them working.
I am well aware that ST is not a software company and their software testing process, if it exists at all (which often I doubt and by no means I try to be mean), is not perfect and a lot of frustration is to be expected, especially with a new product, but it is frustration nonetheless. No to mention long time to market.

ABOUA
ST Employee

Hello TDJ,

Please note that the STM32U5A or STM32U59 DK board is sink only and user should ensure to inject 5V on Vbus to get USB host working. you could refer to the note on  examples readme showing how to configure the HW

Regards

@ABOUA If you mean NUCLEO-U5A5ZJ-Q board, than it can be configure to provide USB power using SB8-10 jumpers, although it is not documented and should be done with caution.
True, such configuration is not an option for STM32U5A9J-DK board, which probably you are referring to, but I think powered USB hub can be used.
All the above has nothing to do with incorrect CubeMX USB_OTG IP initialization.

TDJ
Senior III

To summarize,

  1. CubeMX does not properly configure high speed USB IP available on new STM32U59x/5Ax/5Fx/5Gx MCUs. RCC.APB3ENR.SYSCFGEN is not enabled first.
  2. HS USB_OTG examples are available for STM32U5G9J-DK2 (board not available yet) and NUCLEO-U5A5ZJ-Q. No examples for STM32U5A9J-DK board.
  3. The person who created those examples apparently knew about the problem described in point [1] since user code section in HAL_HCD_MspInit() function contains this line:
    __HAL_RCC_SYSCFG_CLK_ENABLE();
  4. I was unable get any of those examples working. I suspect USBX adapter files found in Middlewares\ST\usbx\common\usbx_stm32_host_controllers have not been updated to work with the most recent version of HS USB_OTG IP yet, but this is just what I suspect.
    Code in _ux_hcd_stm32_initialize() executes with no errors, HAL_HCD_Start() is called but USB events still do not fire upon device connection - OTG_HS_IRQHandler().

I keep investigating.

TDJ
Senior III

Today I did more testing and it gets interesting.

  1. For USB Host to function some interrupt masks (GINTMSK register) have to be set which takes place in USB_HostInit() function. I am showing that this register is written to, but the value does not get set.
  2. In addition to interrupt masks, global interrupt has to be enabled - GAHBCFG.GINTMSK field. This flag is being set in USB_EnableGlobalInt() function called from USB_StopHost() function only. This does not make sense to me.

I would think that probably IP clock is not enable (it is AHB2 G1, RCC_AHB2ENR1.OTGEN), but is is enabled by a call to __HAL_RCC_USB_OTG_HS_CLK_ENABLE() and some other registers get set USB_CoreInit() function.

It all does not make sense.

TDJ
Senior III

@TDK@Pavel A. Probably I found the problem - see here.