Why is the range of PLLVCO duplicated?

[aika_sanshin_fromjp]

Hi, I am using STM32H563 Nucleo board, and found the PLL1VCOSEL bit of RCC PLL clock source selection register.

There are duplicates in the settings.

Does anyone know why is the settings duplicates?

I would like to know why and use case.

[ELABI.1]

Hi @aika_sanshin_fromjp 

There is no duplication in the parameters. It is normal to have the interval 150 to 420 MHz included in the interval 192 to 836 MHz.

The PLL proposes 2 VCO settings:

• The VCO range 192-836 MHz can be used with an input frequency of 2 to 16 MHz. The wide frequency range offers a broader frequency spectrum, which can be useful for applications requiring higher frequencies.
• The VCO range 150-420 MHz can be used for an input clock of 1 to 2 MHz. The medium frequency range was implemented for applications such as audio. In audio, you need to generate specific frequencies with high accuracy.

I hope I have answered your question.

Thank you.

ELABI.1

[Uwe Bonnes]

I do not see a duplicate setting.

The medium VCO range setting needs less current. See datasheet 5.3.10