2017-11-09 05:16 AM
I want to protect a memory region from writing. I've configured MPU, but it is not generating any faults.Please help.
Here are the registers configuration:
MPU_RNR = 0x00000000; // using region 0
MPU_RBAR = 0x20000000; // base address is 0x20000000 MPU_RASR = 0x0700110B; // Size is 64 bytes, no sub-regions, permission = 7(ro,ro), s=b=c=tex=0 MPU_CTRL = 0x00000001; // enable MPUNow when I write in this region of memory, it does not generate any exception and writes successfully.
__asm(
'LDR R0, =0x20000000\n\t' // load address in r0, 0x20000000 'MOV R1, 0x77777777\n\t' 'STR R1, [R0,&sharp0]' // write to address 0x200000000 );This is the definition of handler:
void MemManage_Handler(void)
{ __asm( 'MOV R4, 0x77777777\n\t' 'MOV R5, 0x77777777\n\t' );}I am writing to r4 and r5 just to make sure if the handler was executed or not. This has nothing to do with the rest of the program.
Here's a complete source code:
&sharpdefine MPU_CTRL (*((volatile unsigned long*) 0xE000ED94))
&sharpdefine MPU_RNR (*((volatile unsigned long*) 0xE000ED98))&sharpdefine MPU_RBAR (*((volatile unsigned long*) 0xE000ED9C))&sharpdefine MPU_RASR (*((volatile unsigned long*) 0xE000EDA0)) void Registers_Init(void){MPU_RNR = 0x00000000;
MPU_RBAR = 0x20000000; MPU_RASR = 0x0700110B; MPU_CTRL = 0x00000001;}void MemManage_Handler(void)
{ __asm( 'MOV R4, 0x77777777\n\t' 'MOV R5, 0x77777777\n\t' );}int main(void)
{ Registers_Init(); __asm( 'LDR R0, =0x20000000\n\t' 'MOV R1, 0x77777777\n\t' 'STRD R1, [R0,&sharp0]' ); return (1);}void SystemInit(void)
{}#programming #mpu #keil-uvision #fault-exception #stm32f103rb #memmanage-hard-fault2017-11-10 01:07 PM
https://community.st.com/0D50X00009XkX8SSAV
2017-11-11 12:49 AM
thanks
2017-11-11 01:41 AM
NVIC_EnableIRQ (MemoryManagement_IRQn);
Is there any way to enableNVIC IRQ without using the above function? Can we do it in assembly?
2017-11-11 06:49 AM
MemoryManagement_IRQn is negative, NVIC_EnableIRQ() won't work with that, it is a System Handler
2017-11-11 09:40 AM
How should I enable MemManage IRQ than?
2017-11-11 01:23 PM
/* Enable the memory management fault exception */
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;