Hello
I'm currently trying to change the classic CAN into FDCAN, but when i try to change the clock source of FDCAN (which is PLL1Q) from 50Mhz to 80Mhz to use FDCAN, the clock configuration keeps giving the message "wrong parameter values" when i try to generate it.
In the datasheet of stm32h753VIT6, it says
"The clock calibration on CAN unit is designed to operate under the following conditions:
• a CAN kernel clock frequency fdcan_ker_ck up of at least 80 MHz"
which means the clock of FDCAN must be setted to at least 80MHz, so the clock must be setted to 80MHz in order to use FDCAN.
At this clock setting, the only thing that uses the PLL1Q setting is FDCAN, so why can't I use values above 50MHz?
I'll attach the ioc file that is associated with this issue.
