where is the 2nd I2C interface of STM32F103?

[laojian]

Posted on October 29, 2015 at 08:59

Hi all,

Recently I am working on a demon code using STM32F103.In this demon code,it defines the PE2, PE3 as the I2C interface, as below:

/* Configure I2C pins: PE2->SCL and PE3->SDA */

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 ;

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

GPIO_InitStructure.GPIO_Mode =GPIO_Mode_Out_PP ; 

GPIO_Init(GPIOE, &GPIO_InitStructure);

GPIO_InitStructure.GPIO_Pin =   GPIO_Pin_3;

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

GPIO_InitStructure.GPIO_Mode =  GPIO_Mode_Out_PP ;

GPIO_Init(GPIOE, &GPIO_InitStructure);

/* ---------------------------------------------------- */However, I checked through the reference manual and datasheet, it claims F103 has 2 I2C interface, but very few information on the 2nd I2C, such as AF of which pin are defined as I2C.In datasheet Pin information chapter, it syas:

PE2  :  TRACECK/ FSMC_A23

PE3  :  TRACED0/FSMC_A19

So, Trace function pins, CK and Data0, can be configured as I2C2? I checked the code of later parts, I found code as :/* ---------------------------------------------- */

static void I2C_SendByte(uint8_t SendByte)

{

    uint8_t i=8;

    while(i--)

    {

      //SCL_L;

      //I2C_delay();

      if(SendByte&0x80)            

               SDA_H; 

      else SDA_L;  

      SendByte<<=1;

      I2C_delay();

      SCL_H;

      I2C_delay();

       SCL_L;

       I2C_delay();

    }

}

&sharpdefine SCL_H         GPIOE->BSRR = GPIO_Pin_2     

&sharpdefine SCL_L         GPIOE->BRR  = GPIO_Pin_2

&sharpdefine SDA_H         GPIOE->BSRR = GPIO_Pin_3    

&sharpdefine SDA_L          GPIOE->BRR  = GPIO_Pin_3

/* -------------------------------------------------------------- */So, it seems like the code actually use GPIO of PE2, PE3 to mimic the operation of I2C, it didn't use any I2C related register. Right? #i2c2

[Chris1]

Posted on October 29, 2015 at 21:18 Some F103 variants ''STM32F103x4 and STM32F103x6 are identified as low-density devices'' only have one I2C peripheral, others have two.  If the device you are using has two, the Datasheet will have rows that include I2C2_SCL and I2C2_SDA in the pin definition table in the Pinouts and pin descriptions section. That tells you what pins can be connected to the second I2C, if there is one. You are correct that the the code in your example uses GPIO ''bit-banging'' to achieve I2C functionality, not using an I2C peripheral.  

[John F.]

Posted on October 30, 2015 at 09:19

I noticed PE2->SCL and PE3->SDA pins are configured as push-pull.

GPIO_InitStructure.GPIO_Mode =GPIO_Mode_Out_PP

Normally, they would be Open Drain. In defence of bit banging I2C - it's often the simplest and most trouble free way to do it especially if the manufacturer's implementation of I2C in the silicon is poor.