What's wrong with this WWDG initialization code?

Based on the info in the STM32 reference manual, I would have thought this code to start up the WWDG would work (after processor reset).

// sets up the WWDG with a period of about 1 sec, no lower limit
inline void StartWwdg() {
 LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_WWDG);
 for (int i=0; i<100; i++) {} // do we need to wait for the clock enable?
 WWDG->CFR = (3<<7) | (1<<9); // divide by 2^8, EWI enabled, no lower limit
 WWDG->SR = 0;
 WWDG->CR = (1<<7) | (1<<6) | 14; // divide by 14, enable wwdg
}

(The pclk frequency is 16 Mhz)

However, after stepping through in the debugger, I immediately lose contact the debugger after stepping over line 7 (presumably because of a reset). I cannot figure out what is wrong with the code. Any help would be welcome.