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What is the output pulse duration of the TIM1 TRGO 2 compare pulse mode?

ZJohn.1
Associate II

Hi,

I want to confim the pulse duration fo the TIM1 TRGO2 compare pulse. I used the TIM1 trgo2 to trigger the ADC. The TIM1 clock is 64MHz and the ADC clock is 32MHz, the sampling time is 7.5 ADC clock.

0693W00000LyUHpQAN.pngI want to set the ADC trigger mode is "01", but in the software I config the ADC trigger mode is ‘11:Hardware trigger detection on both the rising and falling edges’.

0693W00000LyULhQAN.pngThe result of my tests is that the pulse only triggers the ADC once on the rising edge.. The falling edge did not trigger the ADC converter. So the '11' is same with the '01:Hardware trigger detection on the rising edge '​.

Is the pulse width of the TRGO2 only one clock cycle of the TIM1? If I want to trigger the ADC on the rising edge, is it ok if I use the "11" instead of "01"?

I'm using STM32G031 and STM32F301. The results are the same for both models.

I did not get the information from the user manual or other datasheet.

Thanks and best regards.

John

1 ACCEPTED SOLUTION

Accepted Solutions
Bob S
Principal

The trigger "pulse" is likely one clock cycle wide - either timer clock cycle or bus clock cycle. [EDIT: i.e. the trigger is "high" only as long as the "compare" is true]. Either way, there is no way the ADC can respond to both edges.

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4 REPLIES 4
Bob S
Principal

The trigger "pulse" is likely one clock cycle wide - either timer clock cycle or bus clock cycle. [EDIT: i.e. the trigger is "high" only as long as the "compare" is true]. Either way, there is no way the ADC can respond to both edges.

KnarfB
Principal III

On a larger chip like F303 with 2 ADCs you can trigger 1st by the rising edge, and 2nd by the falling edge and measure the TRGO2 pulse width by polling end of conversion flags.

hth

KnarfB

The information is helpful. Thanks for you help.​

Thanks for you help.​