what is the EVENTOUT Cortex output?

lanchon · ‎2008-09-07

Posted on September 08, 2008 at 07:32

bob239955 · ‎2011-05-17

Posted on May 17, 2011 at 12:26

Now in section 7.4.1. Does anyone from ST or ARM know?

joseph239955 · ‎2011-05-17

Posted on May 17, 2011 at 12:26

Without schematic diagram, I can only guess that it allow the TXEV (transmit event) signal from the Cortex-M3 processor to be output to the port pin. This signal is asserted (pulsed) when the SEV (Send Event) instruction is executed.

This can be used to connect to RXEV (Receive Event) signal of other Cortex-M3 processor(s) to wait up from WFE (Wait For Event) sleep. On STM32, you can configure the event input to be connected from EXTI controller via the Event Mask Register (8.3.2), and various other EXTI registers to define the event generation.

Note that sleep triggered by WFI (Wait-for-Interrupt) does not get wake up by RXEV signal. This only apply to WFE.

regards,

Joseph

lanchon · ‎2011-05-17

Posted on May 17, 2011 at 12:26

what is the ''EVENTOUT Cortex output''?

''5.4.1 Event control register (AFIO_EVCR)

Bit 7 [...] When set the EVENTOUT Cortex output is connected to the I/O selected by the PORT[2:0] and PIN[3:0] bits.''

thanks!