What if callback function is interrupted?

[Jeroen deBuffel]

On the STM32L0 I have a callback defined based on RTC alarms. In parallel I have a number of external interrupt (EXTIs) .

Scenario

Callback function is running due to RTC Alarm interrupt. Now EXTI is triggered as well (or visa verse -> EXTI function is interrupted by RTC Alarm interrupt)

Question

Is the callback function finished before the EXTI function is running. How is it handled in the STM32L0?

Thanks

[berendi]

It depends on the interrupt priorities.

A higher priority interrupt request will interrupt a lower priority handler. The lower priority handler will resume when the other one completes.

If the priorities are equal or the second interrupt has lower priority, then the second interrupt handler is called when the first one completes.

You can read mode about interrupt handling in the programming manual for your MCU.

[Jeroen deBuffel]

That means the interrupts are really nested and in principle you execute all code (and the order depends how you design prios)

I just printed the prog. manual // some reading to do tonight

[berendi]

Yes. As I recall there are only​ 4 priority/nesting levels available on the STM32L0.

[Tesla DeLorean]

The chapter on the NVIC being the most important.

Callbacks are done under interrupt context so will inherit the priority/preemption level of the calling IRQ Handler.

I would be very careful to keep the highest priority interrupts doing the least possible work, and deprioritize those doing heavier work.

Don't dwell in interrupt context, so no delay loops, polling on status, etc.

The CM0 doesn't have the same grouping options as the CM3/CM4

[TDK]

> Is the callback function finished before the EXTI function is running. How is it handled in the STM32L0?

It depends on how you've configured the interrupts, which is done in NVIC_PriorityGroupConfig.

The most common configuration (NVIC_PriorityGroup_4) is that interrupts can pre-empt each other. However, you can disable this if you want such that interrupts can never be interrupted.

You could set NVIC_PriorityGroup_0, in which case interrupts can never pre-empt one another.

Apparently, at clive1 mentions, this is not the case on the Cortex-M0. It's true for the -M3 and -M4.

[Jeroen deBuffel]

I read up on the cortex-M0 and there are indeed 4 priority levels (M3 and M4 have more and work different).

However afai understood there is a mechanism "interrupt preemption" in the STM32L0.

So when interrupt callback (A) is running and a higher priority interrupt occurs, then the current interrupt callback (A) is suspended and higher priority interrupt function (B) is executed. After B is finished A is resumed.

Is that a correct understanding?

[berendi]

Exactly. Lower priority interrupt handlers are interrupted and resumed the same way as the main program. Because there are 4 priority levels, they will be nested at most 4 levels deep.​