2012-02-22 08:09 AM
Hi,
I use STM32F205RCT6 and attached you will find a sample for the STM320G-EVAL. Following problem. I have enabled the watchdog, but the FLASH_EraseSector takes much longer as the watchdog timeout. So I tried to reset the watchdog with the WWDG_IRQHandler. But the interrupt isn't called in this case! Reference Manual: When the EWI interrupt cannot be served, e.g. due to a system lock in a higher priority task, the WWDG reset will eventually be generated. And Watchdog cannot be disabled again except by a reset. Any ideas would be most welcome. Thanks #watchdog-flash-erase2012-02-23 01:02 PM
at 30 MHz
if you are only running 30MHz, do you HAVE to use a F2, using a F1 with LSI clocking of the WD would handle it easily. Erik
2012-02-23 01:25 PM
Wow, now we have indented replies, that's new.
The erase times for the F2 are fantastically sucky, see page 90http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00237391.pdf
The F1 has 1KB and mass-erase times maxing at ~40ms Agree with Eric, if you can use an F1, or the even the large memory F1's which have two flash banks, that might be a better way to go. Using the F2's FLASH as intermediate storage is not the way forward. Perhaps an external NAND FLASH, or Micro MMC?It really surprises me that the F2 does not have the facility for a separate puppy clock some certifications require that.I think that's what the IWDG is for, as noted earlier is uses an internal low frequency source, being independent and all.