2022-05-13 03:30 PM
I have experienced this issue on STM32L4R and STM32U5. If debugging through STOP mode (with DBGMCU_CR_DBG_STOP set), the flash memory occasionally seems to read out garbage as the MCU is coming out of STOP mode. This typically causes the CPU to hard fault.
Disconnecting the debugger and power cycling the MCU (to clear DBGMCU_CR_DBG_STOP), causes the same code to run perfectly. Alternatively, making any small code change that causes the WFI and subsequent code to change its address alignment in the flash also seems to fix the issue, even when running in the debugger. Another alternative is to increase the number of wait states, which also fixes the issue.
Is this a known issue? Has anyone else experienced it?
Solved! Go to Solution.
2022-05-13 11:43 PM
The Wrong instruction fetches from flash memory upon wakeup from Sleep or Stop mode when
debug in low-power mode is enabled erratum?
JW
2022-05-13 11:43 PM
The Wrong instruction fetches from flash memory upon wakeup from Sleep or Stop mode when
debug in low-power mode is enabled erratum?
JW
2022-05-14 09:01 AM
Thanks Jan. Looks like ST added it to the STM32L4R errata sheet a couple of months ago. I was using an older errata sheet -- rookie mistake. They haven't (yet) added this issue to the STM32U5 errata sheet.
To ST: It seems the workaround is not sufficient. On STM32U5 I have experienced this issue even with the ISB in place. (ICACHE disabled.) I think I have also experienced it on the STM32L4R with the ISB in place. However, adding ISB when the ISB was *not* in place did seem to resolve the issue. Could it be that address alignment is a critical component, perhaps related to the prefetch buffer impacting when a read from flash is needed.