Using cascaded TIM4 and TIM8 in STM32G431

[BTrem.1]

I'm currently using TIM8 (adv timer) in a capture compare application with two channels. I'm also using TIM4 (general purpose) as just that, a general purpose timer. I now find I need more than 16-bits in TIM8, more like 19-bits.

Can I cascade TIM8 and TIM4 to get a 32-bit timer for capture compare applications? Does it matter which is Slave and Master? If this is feasible do I then just read both 16-bit registers when in the ISR? My ISR is currently just saving the capture register value for TIM8 Ch1 and Ch 3.

Thank-you,

[TDK · Accepted solution]

> Can I cascade TIM8 and TIM4 to get a 32-bit timer for capture compare applications?

Yes, you can chain them.

> Does it matter which is Slave and Master?

No, it doesn't matter which is which because either one can be triggered from the TRGO signal of the other one. (see Interconnection details in reference manual.)

> If this is feasible do I then just read both 16-bit registers when in the ISR?

Yes, although you need to be careful here. I would use the slave timer to trigger the IC because you will get better accuracy. You'll need to check if the overflow of the master happens before you read its value, but after the IC trigger. In which case, you will need to subtract one from the master timer CNT value.

Or just use a 32-bit timer (TIM2/TIM5).