USART with DMA receive Timeout

[laurie]

Posted on February 06, 2012 at 03:34

Hi, I'm using an STM32F103 board running at 24Mhz. I have USART1 set at 115200 to send and receive transfers using DMA. This is working fine except when an incomplete packet is received. What I need to do is add a timeout capability similar to that suggested in Method 1 of AN3109.

Unlike method 1, I was thinking it would function by setting a timer that would generate an update event interrupt (my timeout indication) at say a 3 character time interval (The time to receive 3 characters). If the update event interrupt is generated then a timeout has occurred. The timer is preferably started when the first character is received. Every time a character is received, the timer is reset. The timer is stopped when the whole packet has been received. Packets are at least 20 characters in length.

How do I connect an Input Capture to the RX line (PA10)? The manual really didn�t help me understand this (or I didn�t find the section that explains it).

I�m guessing I must have to use TIM1_CH3 as it is also listed as being on PA10.

Is that true or could I use a different timer and channel?

I�d really like to see sample code that sets up this configuration as I can�t find any.

Seems like something that would be useful to lots of users too.

Cheers                                  ...Laurie:{)

P.S. Having looked for this for days and then posting, within 30 minutes I find this: http://www.st.com/internet/com/SOFTWARE_RESOURCES/SW_COMPONENT/SW_DRIVER/an3109.zip Just going through it now to see if it holds the asnwers. ...Laurie:{) Answering my own questions: You have to make a physical connection from the RX pin to a TIMx_CHn pin (where x and n are the timer and channel that will then monitor the comms). I don't have a spare pin on the production board so I've decided that on the receipt of the first character I'll calculate the timer length to be 3 characters longer than the expected characters to be received (I know how many characters to expect). Start the timer. If all the characters are received then stop the timer. If not all characters are received, the timer will update and generate a timeout event. Thanks         ...Laurie:{) #dma-timeout

[Thomas_Socomec]

Posted on February 09, 2012 at 12:12

I am also interresting by this functionnality !

The technical note is not enough clear in my point of view, and some example code could be very helpfull. Thomas

[emalund]

Posted on February 09, 2012 at 16:03

This is working fine except when an incomplete packet is received. What I need to do is add a timeout capability

the tried and true method is to every time a character is received,  (re)set a timer.  Then if the timer interrupts you have an incomplete package. Erik

[laurie]

Posted on February 16, 2012 at 11:38

Hi Erik,

I'm in the process of testing my DMA timeout implementation. The packets I receive have some characteristics that allow me to resynchronise the communications when a partial packet is received. (Especially useful at startup). Thr first character in a packet is always the same byte so I can look for it. What I do is set an initial DMA for 1 character  but with no timeout. After that, I know the header is always a fixed size so I can set a DMA to get the remainder of the header and a timeout that is a few characters longer. (I set the timer's prescaler such that it counts the time for 1 character to arrive and then set the count register to 3 more characters than I'm expecting. This way I have some tolerance for variation). Once I have the header I get it CRC checked. The header has the payload length. I load the payload length into the DMA count and also set the timer again based on the new length. Once the packets are rolling in, the CPU is only interrupted 3 times per packet. The 1st character DMA is also useful for in collision detection on my shared serial bus. Does that help you? ...Laurie:{)

[kornfeldner2]

Posted on February 16, 2012 at 14:36

i use the IDLE interrupt of the USART to check if the packet is received.

[laurie]

Posted on February 16, 2012 at 22:04

Hi Erik,

I looked at that but the manual seemed to imply an 'idle' frame/characters were required from the other end (which I don't have - is it really just a quiet time with no trasmission?) and that only a single character delay in transmission would cause the interrupt. ...Laurie:{)

[kornfeldner2]

Posted on February 17, 2012 at 06:50

you don't need a special character at the end of transmisson. if the rx lines goes to idle, then you will get the IDLE frame interrupt.

i use this feature and is working without special characters on the line

[laurie]

Posted on February 17, 2012 at 07:57

Thanks Erik,

I'll give that a go. I expect it will be a better indicator of ''between packet'' time. Cheers      ...Laurie:{)

[liujingsong13]

Posted on August 05, 2015 at 04:13

hi,I read the manual ,it says :''An Idle character is interpreted as an entire frame of “1�?s followed by the start bit of the next

frame which contains data (The number of “1�? ‘s will include the number of stop bits).''  ,So it needs a start bit ,i think this method cannot cause a interrut 

[Tesla DeLorean]

Posted on August 05, 2015 at 05:15

I read the manual ,it says :''An Idle character is interpreted as an entire frame of ?1?s followed by the start bit of the next frame which contains data (The number of ?1? ?s will include the number of stop bits).'' , So it needs a start bit, i think this method cannot cause a interrupt

The diagram however pretty much defines that the idle frame is absent a start bit, it's basically an entire symbol time with the signal high. While I see what you're saying, I'm not sure that makes sense. The arrival of a start bit prior to it clocking out would kill the idle detection, but the absence of a start bit for an entire symbol time wouldn't really need exact closure. I'd suggest you test whether the *next* start bit is actually required for it to trigger.