Understanding STM32F4 FSMC

[edgar]

Posted on July 30, 2013 at 10:15

Hello, 

I am new to STM32F4 and I have been digging into documentation for the lasts two weeks.My application uses a 320x240 LCD display and is managed through the FSMC bus. If I have understood correctly the FSMC manages four banks of memory and each one is divided in four memory regions. I am only interested in Bank1, which is the NOR/PSRAM memory, but I have some questions.

1. What do NE1, NE2, NE3 and NE4 signals do? Do they select the Bank or do they select the region of memory (from 0x60000000 to 0x6FFFFFFF) once a Bank has been selected. In that case, how can I select a Bank? 
2. How are these signals (NEx) managed? Do I have to worry about them or the FMSC manages them internally?
3. The FSMC bus has 26 bits for the address, but the reference manual says that bits 25 and 26 of the address select the one of the four memory regions of Bank1. How can these bits be controlled?

As you can see I am pretty lost. Any help would be appreciated.

Thanks in advance, Edgar. #stm32 #fsmc

[waclawek.jan]

Posted on July 30, 2013 at 12:57

In traditional processor boards, you would have an address decoder of 1-of-N type  (think of 74xx138 for example), which inputs is connected to the higher-most address bits, and outputs go to chip selects of connected memories. In this particular case, there is a cascade: one decoder which sets its output active when address bits 31..28 = 0110 (0x6), which is an ''enable'' input to other 1-of-4 decoder with inputs tied to address bits 27..26 and producing the four NEx outputs. In other words, if you read/write anywhere from/to 0x60000000-0x63FFFFFF, NE1 gets (automatically) active; if you read/write from/to 0x640000000-0x67FFFFFF, NE2 gets active; etc.

So, you simply tie NEx to the memory's (memory-mapped device's, here: LCD's) chip select pin, address signals to address pins, data to data pins, read/write signals to read/write pins; and then (after having properly set up the FSMC unit) simply read/write to the corresponding area and FSMC takes care of wiggling the appropriate pins automatically. JW

[avnerg]

Posted on June 28, 2016 at 16:06

Hi,

I am just starting to work with the ST MCUs. I am using the STMcube and there is something I don't understand regarding this:when I look at the code generated for the FSMC interface for a NOR flash is seems that the functions to read/write to the flash is done as if writing/reading to the MCU address. is this related to the abouve explanition? Thanks,Avner

[waclawek.jan]

Posted on June 28, 2016 at 19:49

I don't exactly understand what do you mean by ''writing/reading to the MCU address'', but ARM has only one but huge (4GB) single memory space, which is then split up among the various targets - internal FLASH, internal RAM, internal peripherals, the processor's private peripherals such as NVIC, and among them is also the FSMC (or FMC in some higher-end STM32 subfamilies), starting at address 0x60000000.

You can find a ''Memory map'' figure in every STM32 datasheet and every STM32 reference manual. JW