tradeoff between low-power and features\performance

[Roy Ben Hayun]

Wondering what are example cases where low-power STM models should be preferred, and what would be the trafe-off in terms of features and performance.

To help me better understand by using specific case, would be happy if I could get 2-3 examples, clear and concrete, demonstrating how a low-power STM vs a standard STM were compared i.e., removing a feature, making a performance decision per a specific case, etc.

Thanks!

[Pavel A.]

Seriously? You've never seen a battery-powered device that should last for a certain time?

-- pa

[Nikita91]

Some trade-off:

Low power => low frequencies. In ST datasheet the consumption is uA / MHz!

Low power => use much more software to use sleep modes, switch core/peripheral frequencies, use backup SRAM, configure unused GPIO, etc

Low energy requires special skills.

[Roy Ben Hayun]

thanks. the "low frequencies" hinted to more search and found this discussion: https://www.researchgate.net/post/What-are-the-pros-and-cons-of-running-a-microcontroller-at-low-and-high-frequency

could you please clarify more about the backup SRAM? is there any impact related memory e.g., Flash?

[Nikita91]

About backup memory:

When the MCU goes to deep sleep (aka standby), the memory (SRAM, FLASH) is unpowered and the SRAM content is lost.

But the application can put some data in a small low power SRAM powered by the VBAT pin : the backup SRAM. So on wakeup the application can recover its context.

[Roy Ben Hayun]

Thanks Nikita. Very clear and helpful.