2020-02-15 04:52 AM
2020-02-16 04:11 AM
In the ADC characteristics chapter in Datasheet?
JW
2020-02-16 04:50 AM
:)) You are right, I wasn't specific.
Datasheet gives different ADC clock frequencies for fast and slow channels, altough the very same ADC and sample&hold capacitor works with the same resolution. It means analog multiplexing speed differs. If I use several channels (mixed fast and slow ones) I can't switch ADC clock spped regarding to channel speed "on the fly". Is it good practice to use highest (36MHz) ADC clock, but use longer sample times for slow channels (they can be set independently for different ranks) for slower analog mux to be "settled".