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The issue on FMC EXTMODE ModeA write access

HMats.7
Associate II

Hi community,

I'm developing on STM32F7, it accesses the external device via FMC.

Then it can read the external device's register, but it cannot write to the register.

The external device expects EXTMODE ModeA timing like the following figure.

0690X00000AsUplQAF.png

 Reference from

  RM0410 Rev 4 Reference manual

  STM32F76xxx and STM32F77xxx advanced Arm®-based 32-bit MCUs

Our issue is that NEx signal and NWE signal are falling down at the same time on our target board.

Here is the code for initializing FMC.

-----

 /** Perform the SRAM4 memory initialization sequence

 */

 hsram4.Instance = FMC_NORSRAM_DEVICE;

 hsram4.Extended = FMC_NORSRAM_EXTENDED_DEVICE;

 /* hsram4.Init */

 hsram4.Init.NSBank = FMC_NORSRAM_BANK4;

 hsram4.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;    /*  MUXEN   =0 */

 hsram4.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;          /*  MTYP   =0 */

 hsram4.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;    /*  MWID   =1 */

 hsram4.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;   /*  BURSTEN  =0 */

 hsram4.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;  /*  WAITPOL  =0 */

 hsram4.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;     /*  WAITCFG  =0 */

 hsram4.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;     /*  WREN   =1 */

 hsram4.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;         /*  WAITEN  =0 */

 hsram4.Init.ExtendedMode = FMC_EXTENDED_MODE_ENABLE;       /* + EXTMOD  =1 */

 hsram4.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;   /*  ASYNCWAIT =0 */

 hsram4.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;         /*  CBURSTRW =0 */

 hsram4.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;   /*  CCLKEN  =0 */

 hsram4.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE;          /*  WFDIS   =0 */

 hsram4.Init.PageSize = FMC_PAGE_SIZE_NONE;            /*  CPSIZE  =0 */

 /* Timing */

 Timing.AddressSetupTime = 4;       /* + ADDSET =4 */

 Timing.AddressHoldTime = 15;       /*  ADDHLD =15 */

 Timing.DataSetupTime = 18;        /* + DATAST =18 */

 Timing.BusTurnAroundDuration = 2;     /* + BUSTURN =2 */

 Timing.CLKDivision = 16;         /*  CLKDIV =15(16*HCLK) */

 Timing.DataLatency = 17;         /*  DATLAT =15(17CLK-2) */

 Timing.AccessMode = FMC_ACCESS_MODE_A;  /*  ACCMOD =0 */

 /* ExtTiming */

 ExtTiming.AddressSetupTime = 4;      /* + ADDSET =4 */

 ExtTiming.AddressHoldTime = 15;      /*  ADDHLD =15 */

 ExtTiming.DataSetupTime = 25;       /* + DATAST =25 */

 ExtTiming.BusTurnAroundDuration = 2 ;   /* + BUSTURN =2 */

 ExtTiming.AccessMode = FMC_ACCESS_MODE_A; /*  ACCMOD =0 */

 if (HAL_SRAM_Init(&hsram4, &Timing, &ExtTiming) != HAL_OK)

 {

  Error_Handler( );

 }

-----

What is the wrong for this issue?

Thanks in advance for any help.

Thanks,

Hiromichi

6 REPLIES 6

Read out and check/post the relevant FMC registers' content.

JW

HMats.7
Associate II

Hi JW,

The relevant FMC registers' content is as following.

BCR4 = 0x00005091

BTR4 = 0x0FF212F4

BWTR4 = 0x0FF219F4

I attach the picture of the the all FMC register's content on MDK-ARM.

This picture took after initializing on our target board.

0690X00000AsYPNQA3.png

Thanks in advance for any help.

Thanks,

Hiromichi

This appears to be OK to me.

Are you using also the remaining 3 banks, and they work OK?

Do read waveforms (especially NOE) work as descrbed for ModeA?

Please note that this is a primarily user-driven forum, with only casual ST presence. You might want to contact ST directly, through web support form, or through FAE.

JW

HMats.7
Associate II

Hi JW,

Thank you for your cooperation.

I will check waveforms together with our hardware team.

I'm sorry that I didn't understand community rules.

I will try to contact ST support.

Thanks,

Hiromichi

 > I'm sorry that I didn't understand community rules.

No, no, it's perfectly OK to discuss this issue here. I wrote that just for you not to be disappointed that nobody from ST responded.

JW

Hi Hiromichi,

did you succeed in resolving this issue?

Thanks,

JW