SysTick preemt

[mrandr]

Is it possible to ensure that the systick is handled (or the timer that handles the ms tick), and at the same time not interrupt higher priorities unless the irq has been busy/active for example 1 ms?

I guess the question applies for arm M0 - M4 in general, however I'm using the stm32 g4 and g0 series and no os.

[Nikita91]

I'm not sure I understand your question...

Do you want systick to be served but not higher priority interrupts?

Or that systick doesn't preempt higher priority interrupts?

An interrupt never interrupts a higher priority interrupt.

What can happen is that when interrupts are inhibited a high priority interrupt is not served.

By using the BASEPRI register it is possible to inhibit only certain priority levels, and interrupts higher than BASEPRI will continue to be served. This feature is not present in M0(+) cortices, but is present in M3, M4, M7, M33, etc.

[Tesla DeLorean]

Yes, you can get it to preempt,make sure the NVIC is set so grouping permits preempt levels, and then park SysTick at it's own level.

If you need a 1ms tick count, better to use a maximal TIM in 32-bit or 16-bit mode, that counts, and is NOT dependent on interrupts to move forward consistently in linear time.