2013-09-03 03:07 AM
Hi,
I would like to ask, what is necessary to make when I configure a input channel as a cascade 32 bit counter, using a master/slave timers as counters, and then when I need to use this input channel as a 16 bit counter (only). And when it is configured as a single 16 bit counter and want to switch to a 32 bit counter. Can I make at start_up stage, all the configuration required for a 32bit counter in cascade mode using two timers, and then if necessary I make the enable/disable of the slave counter, and enable/disable of the RCC clock of that slave peripheric. Or need I to configure all the registers again? I'm not sure, but I thing I have read somewhere that if I disable the peripheral clk it clears all register. Is this true? I know that you could say that a 32 bit counter is always a 16 bit counter. Yes, I know but it spends energy and I'm a environmental friend, so I would like to applicate this principle in all my applications. Best regards, Almerindo Paiva2013-09-04 07:22 AM
I confirm that disabling the timer clock, resets all configurations.
So, one need to reconfigure all registers.2013-09-04 08:24 AM
but...
What is the diference between disabling a peripheral by reseting the RCC_APBxENR bit, and setting the same peripheral using the RCC_APBxRSTR register (if they make the same). Best regards, Almerindo Paiva2013-09-05 12:34 AM
RCC_APBxENR enables or disables the clock to the peripheral logic. RCC_APBxRSTR asserts or deasserts the RESET of the peripheral logic. If you want to use the peripheral, enable the clock and if not using it then disable the clock to save power.
With the clock running assert RESET to put the peripheral logic in a known state. (Then you have to initialize it.) This is applicable to electronics hardware in general. Look at the Reference Manual for your device and the library ''Help'' file (the .chm file) for more information.