It's probably fool-hardy to assume much of anything has been explicitly tested against an array of parts.
Perhaps look at the schematics and BOM for several of the STM32 designs with the same/similar FMC, and the Micron / ISSI parts they have frequently chosen, and which might also have long-term availability considerations.The IP that ST uses frequently isn't designed in house, and is used in multiple products with minimal alterations.
Perhaps also look at the boards by the like of WaveShare, Arduino/Portenta, OpenMV Cam, assorted Taobao and AliExpress vendors.
Most SDRAM are used in a derated mode, below their maximal frequencies/modes. I'll also note that the technology used is relatively mature (several decades old) and well understood in its performance/function, this is not bleeding-edge performance memory.
Considerations in PCB tend to be matched line lengths, and ability to escape signals.
https://www.st.com/en/evaluation-tools/stm32h7b3i-dk.html
