STM32U5A5 Hard fault setting SYSCLK > 64Mhz

[moylando]

I'm trying to crank up the clock to Timer1 to be able to count high frequency events with better resolution.  If I set the SYSCLK to 128 I get a hard fault when my code reaches SystemClock_Config().  Even if I keep the AHB bus at the same speed (64Mhz) using prescaler.  In this case the only clock difference seems to be SYSCLK value.

Here's the first configuration which works ok:

and here's the other where it will hard fault:

Since the IDE says I should be able to take HCLK to 160Mhz which would require a much higher SYSCLK, I don't see why this SYSCLK value should cause a fault.

[TDK]

Is this custom hardware? Ensure power rails and decoupling capacitors and other power supply infrastructure is functioning correctly. Show the schematic if you can.

Step through SystemClock_Config to see where it hard faults, and/or look at the hard fault to shed light on what may be failing.

[moylando]

Hey, thanks for the reply.  It's a Nucleo-U5A5ZJ-Q.  Not custom.

Here's a backtrace:

a HAL_GetTick() is called after modifying RCC->CFGR1