STM32U545RE-Q: not getting ADC1 conversion data via GPDMA

[cjb89]

Hello everyone, 

I'm currently trying to set up the two ADCs (ADC1, ADC4) on my NUCLEO-U545RE-Q for multi-channel continuous conversion via GPDMA (I've previously used an L4+, but intend to change to the U5 family for the final product and am using the NUCLEO board to test the migration).

I have - to the best of my knowledge - replicated the ADC and DMA settings I've used successfully on my L4P5CE on the U545RE's GPDMA and both ADCs, however ADC1 and ADC4 seem to have slightly different "architectures" (for lack of a better word), so I've - again, to the best of my knowledge - replicated the settings on both as best I can. 

However, while this works with ADC4, I'm not getting any data on ADC1.

Thing I have tried (without success - only ADC4_res_buffer is getting new data): 

- enabling/disabling the ADC and GPDMA interrupts

- different ADC clock frequencies

- Swapping the channels between the ADCs (ADC1 Ch1/2; ADC4 Ch3/4 or ADC1 Ch3/4, ADC4 Ch 1/2)

- enabling/disabling ADCEx Calibration, different calibration modes

- swapping the HAL_ADC_Start_DMA order

I'm really hoping you can help me here; I've attached both the .ioc file (where I've set the GPDMA and ADCx settings) and the main.c file. 

Best regards

Christoph

[Hl_st]

Hello,

in debug mode, can you see in ADCx->DR register correct measured value? It seems to me, you should set also some periodic trigger to ADC. For example set ADC: External Trigger Conversion Source to Timer 15 Trigger Output event. Then set Timer 15 clock source as: Internal Clock and Trigger Output Parameters as Enable and Update Event. After calling function HAL_ADC_Start_DMA(), call HALL_TIM_Base_Star(&htim15) function. Now ADC will be periodically triggered by timer 15 reloading. Frequency of ADC triggered will be then defined by Timer 15 input frequency, its Prescaler and Autoreload register values. 

[cjb89]

Hi, 

thank you for the reply. I've configured ADC1 as Regular Conversion Scan to alternate between IN1 and IN2 (PC0/PC1). I've connected one input to 3.3 V and the other to GND on the NUCLEO board I use for my tests and I can see the hadc1 DR toggle between ~27 and 16383 (I've used flywires, and the 3.3 V is probably the VDDD rail, so these values seem very much plausible), so it seems like the ADC is being triggered and does indeed convert the analog data on its inputs. 

As such, I think there is somehing wrong with how I set up the GPDMA? I've used the same settings for GPDMA Channel 0 (which transfers the data from ADC4, which works flawlessly) and GPDMA Channel 1 (which should transfer the data from ADC1, but doesn't seem to do anything). Is there anything I'm missing in how I've set it up in the .ioc file?

Best regards

Christoph

[cjb89 · Accepted solution]

Hi, 

I've found the issue: The "new" ADC1 has an additional field I wasn't familiar with: "Conversion Data Management Mode". This needs to be set to "DMA Circular Mode" instead of "Regular Conversion data stored in DR register only" - maybe it'd be a good idea for CubeIDE/CubeMX to warn the user when it detects that it's set to "DR only" while DMA is active for the ADC? Anyways, it now works as expected!

The ADC on the L4P5CE and ADC4 on the U545RE-Q does not have this option/field, so I didn't pay it too much attention, I guess. 

Best regards

Christoph