2025-06-23 4:21 PM
In looking at AN3155, USART protocol used in the STM32 bootloader, the following diagram describes the MCU's write protect command sequence from the device side:
There is a comment at the bottom which indicates that only certain F and L series chips perform the system reset. I am working with a STM32U585QI, and I also see that this chip appears to perform a system reset when executing the write protect command. Is that correct and this comment is just wrong, or am I seeing this unexpectedly?
2025-06-24 1:49 AM
Hello @dsurrett ,
The note in the AN3155 is correct. A system reset when executing the write protect command doesn’t apply to STM32U5.
On the STM32F4/F7/L4 series listed on the AN3155, modifying the Option byte doesn’t generate a reset – it’s bootloader SW who add a NVIC_SystemReset after any OB change. But for the new STM32 we removed that as it’s not aligned with the HW behaviour.
Now, if a product generates a system reset after modifying the OB, this is due to the HW itself:
You can refer to the RM0456 related to your product and check this detailed on "Embedded flash memory (FLASH)" part.
Hope I answered to your question and this clear for you now.