2021-11-29 11:57 AM
I'm looking for some more information when it comes to the STM32 OctoSPI support for Regular command versus HyperBus protocols when it comes to interfacing with an external PSRAM in Memory Mapped mode.
We are considering a ISSI OctaRAM part vs HyperRAM due to the operating temperature of 125C for the OctaRAM variant vs 105C for all the HyperRAM variants. We will also have external QuadSPI flash that will not be HyperFlash compatible.
We want to do some risk reduction by getting the the U5 IOT dev board that has an external OctoSPI memory onboard, but am worried that since it's a "HyperRAM" variant that whatever proof of concept we run isn't going to be 1-to-1 when we get our prototypes with the OctaRAM part.
I have a few questions:
Thanks!
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2021-12-08 06:33 AM
Hello @Community member,
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Chahinez.
2021-12-08 06:33 AM
Hello @Community member,
I hope my answer helped you; please mark it as best by clicking on the "Select as Best" button if it fully answered your question.
Chahinez.
2021-12-10 03:56 PM
Thank you for the info, this helps.
I ended up settling on a HyperRAM due to part availability at least for our first spin, so the question was mostly moot, but the errata document is very helpful.