STM32U5 ADC4: possible to enable DMA and AWD at the same time?

[OpusOne]

Hello, as the title goes: is it at all possible to enable both DMA and an analog window watchdog (AWD1) simultaneously on the ADC4?

What I'm trying to achieve is the following:

1. ADC4 configured to operate in Stop2 mode and triggered by LPTIM1/CH1 (PWM), clocked by MSIK.
2. AWD1 enabled and also in autonomous mode so it works in Stop2 mode and can wake-up the CPU.
3. DMA enabled at the same time and filling a buffer with the ADC4 acquisitions, same channel as the one which has AWD1 enabled, using LPDMA1, also configured to work autonomously in Stop2.

I managed to make the first 2 points work and I'm pretty happy with the results: I get an average current of ~ 7 µA (SMPS enabled) in Stop2, with ADC4 sampling at 500 Hz autonomously (triggered by LPTIM1/CH1) and AWD1 working as expected. So that's pretty good.

I then tried to implement a DMA transfer concurrently on the same ADC4 channel using LPDMA1, and this is where things go wild. DMA transfers and AWD1 on ADC4 don't seem to play well together. I haven't read anything particular about it in the reference manual or in the errata, but I may have missed it.

First issue when doing this is that the DMA seems to get only 1 request every 2 ADC conversions.

Second issue, that seems only related to enabling DMA transfers in ADC4, regardless of whether I enable a DMA channel or not. When setting the transfer mode with:

LL_ADC_REG_SetDMATransfer(ADC4, LL_ADC_REG_DMA_TRANSFER_UNLIMITED);

I get a very odd behavior of the MCU that seems related to the debug IP. Let me elaborate:

1. When the STM32U5 has enabled its debug IP (which happens when we access it through SWD), it draws ~ 160 µA in Stop2 mode, and from what I've read, that's normal behavior. This extra power draw only disappears after a power cycle of the chip.
2. When the debug IP is enabled, but I set the above (DMA transfer enabled for ADC4, then ADC4 enabled), instead of drawing ~ 160 µA in Stop2, it draws only ~ 55 µA. It caught my attention because I found this change odd, and tracked it down to just enabling DMA transfers in ADC4 and then enabling ADC4 (with its autonomous clock enabled) and going to Stop2.
3. Once that has happened (MCU gone in Stop2 mode with DMA enabled for ADC4), not only the current draw looks abnormal, but the debug IP acts in abnormal ways - SWD connection gets lost randomly (I'm using a STLINK V3) while it never happens otherwise. Power-cycling the MCU gets it back to normal.

I haven't read anything related to that in the errata, but maybe I missed it.

Thanks for any pointers about these 2 issues!

Edit: I just want to add to this that it's the "unlimited" DMA mode (circular mode in the RM) that triggers this very odd behavior. In the "limited" DMA mode, it works as expected. Although, the downside is that it automatically stops the ADC when the transfer is done, so that the ADC needs to be restarted after that. But the circular mode behaves very erratically. If anyone's got any idea why...