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STM32L4R7 low-power, power cycling, and the backup domain

NArnd
Associate III

Hello,

I have some questions relating to STM32L4R7ZIT and the different ways to enter/exit low-power modes or to power cycle, in both cases without losing RTC and backup registers.

VBAT is always powered. There is an LSE.

I need to understand which boot-up paths exist and which parts of the MCU must be (re-)initialized in each path. Please see if you can help. Citations from RM0432 v8.

Best regards

Niclas

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Questions:

A. Is it true that STM32L4R7 shutdown mode cannot handle loss of VDD without losing the backup domain (mainly RTC and backup registers)? (See citations 1 and 2.)

B. Is citation 3 the complete list of what is powered from VBAT? Figure 9 is more of a conceptual-level block diagram than a detailed specification. Is there a more formal listing?

C. Similarly, figure 9 also names "VDD domain" with subsystem "VCORE domain", "VDDA domain", "VDDIO2 domain", and suggests that there might also be a "VDDUSB domain". What, in detail, do these domains consist of? Together with the "Backup domain", do they encompass every part of the MCU or is anything missing?

D. What is the relationship between power reset and system reset (or what do they comprise)? In 6.1.1 - 6.1.2 (p238) it says that a brown-out reset causes both a power reset and a system reset. A system reset resets all registers except the backup domain and RCC_CSR. A power reset caused by exiting shutdown mode or a brown-out reset both reset all registers except the backup domain. A power reset caused by exiting standby mode preserves slightly more, but is there a detailed listing somewhere?

E. What is the "Standby/Shutdown modes control" referred to in citation 4?

F. Assuming that RCC_CSR is lost in a power reset (including a power cycle), is there any other way at boot time to find out what caused the latest power-off? Or, is your only option to write the power-off reason to one of the backup registers and make sure that you are not in shutdown mode when your battery power source is finally depleted?

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Citations:

1: "The BOR is not available in Shutdown mode. No power voltage monitoring is

possible in this mode, therefore the switch to Backup domain is not supported."

(p215)

2: "In Shutdown mode, the following features can be selected by programming individual

control bits:

* real-time clock (RTC): this is configured by the RTCEN bit in the Backup domain

control register (RCC_BDCR). Caution: in case of VDD power-down the RTC content will be lost."

(p215)

3. "Backup domain

* LSE crystal 32 K osc

* BKP registers

* RCC BDCR register

* RTC"

(fig 9, p183)

4. "When exiting Standby mode, all registers in the VCORE domain are set to their reset value.

Registers outside the VCORE domain (RTC, WKUP, IWDG, and Standby/Shutdown modes control) are not impacted." (p238)

2 REPLIES 2

This is a primarily user-driven forum, and I haven't seen much in-depth low-power-related experience here (including myself), so take it as such.

A. The citactions appear to indicate quite clearly that this is a known pitfall.

B. some GPIOs are powered, too, although not their full functionality - you can chalk this up to RTC I guess

C. different areas of the chip have different power supplies - much the same as when you design a board powered from different power supplies. Most of them have dedicated pins - maybe except VCORE, which is powered from the internal LDO in most of the STM32 models, although sometimes it's brought out to be filtered by an external capacitor, and in some models the LDO is disabled in favour of external power supply or partially-internal SMPS - and most are related to a group of IO pins. Look at the overall chip diagram in datasheet, usually the voltage domains are marked there.

D. I don't think you'll find a detailed list of what sort of reset influences exactly what registers/resources; you'll have to browse through the RM. It's unlikely you'll find anything relevant outside of the obvious chapters i.e. PWR, RCC and RTC.

E. probably flip-flops related to PWR_CR1.LPMS and similar, i.e. which hold the internal state determining the particular low-power mode

F. there's probably no magic or hidden registers. One of the options you did not mention is to write the reason for powerdown into non-volatile non-powered memory such as internal FLASH or external EEPROM or similar (e.g. FRAM).

JW

NArnd
Associate III

Thank you Jan,

Even when you don't have in-depth knowledge you put in an effort and give a good response. Much appreciated.

I'm afraid I still have much research left to do for and in the documentation, so back down the rabbit hole...

It might be that the best pieces to the puzzle are in code samples such as the "X-CUBE-RTC Expansion Package" mentioned in AN4759.

Best regards

Niclas