stm32l4r5 with NUCLEO-L4R5ZI

[Franzi.Edo]

Dear all,

I am facing to a strange GPIO problem. First af all, I tried to set-up the LPUART1 but impossible to send anything (no activity on PG7 , the Tx of the LPUART1). So, I initialized the PG7 to be a general output and tried to blink it ... no reaction. With the scope I noticed that the pin remain in Z impedance. I tried the same exercise on PG0 and PG1; this work as expected . All the other PGx (that are not connected to special functions of the board) do not change their output. On the other ports (A, B, C ...) I have no problem. Any idea? Do I need some special initialization for this port G? here is ma simple code I used for those basic tests:

static void myTest(void) {

RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // Turn on the GPIOA

RCC->AHB2ENR |= RCC_AHB2ENR_GPIOBEN; // Turn on the GPIOB

RCC->AHB2ENR |= RCC_AHB2ENR_GPIOCEN; // Turn on the GPIOC

RCC->AHB2ENR |= RCC_AHB2ENR_GPIODEN; // Turn on the GPIOD

RCC->AHB2ENR |= RCC_AHB2ENR_GPIOEEN; // Turn on the GPIOE

RCC->AHB2ENR |= RCC_AHB2ENR_GPIOFEN; // Turn on the GPIOF

RCC->AHB2ENR |= RCC_AHB2ENR_GPIOGEN; // Turn on the GPIOG

// Example for PG7

GPIOG->AFR[0]  = (0xF<<28); // AF15

GPIOG->OSPEEDR = (0x3<<14); // Very high speed

GPIOG->OTYPER  = (0x0<<14); // Push-pull

GPIOG->MODER  = (0x1<<14); // Output

GPIOG->PUPDR  = (0x0<<14); // No pull-up

GPIOG->ODR |= (0x0<<7); // Initial value

while (TRUE) {

GPIOG->ODR |= (1<<7);

GPIOG->ODR &= ~(1<<7);

}

}

Thank you for your suggestions,

BR, Edo

[Uwe Bonnes]

With a debugger, stopp in your loop. Read the GPIOG registers and interpret the setting.. Set them by hand and check ODR, IDR and the actual pin state. I did not see any remark around GPIOG in the datasheet, the reference manual or the errata. So there is high propability that your code is not right. Report back!

[S.Ma]

Also check the schematics for PG7, maybe there is something tied there.

[Tesla DeLorean]

You need to explicitly power the GPIOG bank, there is a specific PWR/VDDIO2 setting.​

[Tesla DeLorean · Accepted solution]

 /* IOSV bit MUST be set to access GPIO port G[2:15] */

 __HAL_RCC_PWR_CLK_ENABLE();

 SET_BIT(PWR->CR2, PWR_CR2_IOSV);

or

  /* VddIO2 must be enabled to access GPIO port G[2:15] */

  __HAL_RCC_PWR_CLK_ENABLE();

  HAL_PWREx_EnableVddIO2();

  __HAL_RCC_GPIOG_CLK_ENABLE();

[Franzi.Edo]

All, thank you for your help.

The good answer is the Clive one.

Unfortunately, in the ST documentation this point is explicitly mentioned only in the PWR chapter. As the primary function is related to the GPIO, I would expect a more explicit notice about this special PWR setting for the port G [2..15] even in the GPIO chapter.

Now my program works like a charm.

Thank's