2026-04-09 9:39 AM - last edited on 2026-04-09 9:53 AM by mƎALLEm
Hi,
I am implementing a Dual Active Bridge (DAB) DC-DC converter on an STM32L476RG Nucleo board. The goal is to generate 8 complementary PWM signals using TIM1 (Bridge 1) and TIM8 (Bridge 2), both at 5 kHz with 50% duty cycle, and to control the power transfer by adjusting the phase shift between the two timers.
The phase shift must be adjustable at runtime (via button, potentiometer, or PID controller) without affecting the 50% duty cycle.
I tried three synchronization approaches, all of which failed:
1. Reset Mode (SMS=100): TIM1 sends a TRGO at the end of each period. TIM8 receives it and resets CNT to 0, which cancels any preloaded phase offset every 200 µs. The phase shift cannot be maintained.
2. Trigger Mode (SMS=110): TIM8 starts on the first TRGO then runs freely. The initial phase is correct but there is no ongoing synchronization, which could cause drift over time.
3. CCR1 as TRGO source (MMS=011): Using CCR1 to time the trigger would shift TIM8's start, but CCR1 simultaneously controls the duty cycle of CH1. Changing it breaks the 50% requirement.
My current solution is to set TIM8->SMCR=0 (free-running) and preload TIM8->CNT with a calculated offset before starting both timers. Since both timers share the same 80 MHz internal clock with identical PSC and ARR, no drift is observed in practice.
My question: is there a proper hardware method on STM32L476 to create a stable and dynamically adjustable phase shift between TIM1 and TIM8, without affecting the 50% duty cycle?
Thank you.
2026-04-09 10:17 AM - edited 2026-04-09 10:18 AM
Set up both TIM1 and TIM8 in slave trigger mode and use a separate timer, say TIM2, to start them both. The delay between the trigger and the actual timer start will be the same for both, so they will start exactly in sync.
Adjust shift by changing ARR for one cycle. You will need to disable interrupts and check CNT to do this at the appropriate time. Increase ARR by X for one of them, wait for it to overflow, then change it back. This produces a shift of X ticks between the two and doesn't disrupt the PWM other than extending some pulses by X ticks.
No doubt there are other methods. For 50% duty, you can toggle mode and use CCRx to adjust phase shift. No messing with ARR needed.
2026-04-09 10:27 AM
If I understand correctly, you simply want to generate two phase-shifted signals whose phase you can adjust. One way to do this is as follows:
Enable TIM1 and use CH2 to generate a PWM with a 50% duty cycle. Configure CH1 to generate a "compare event" and send it to the TRGO output (internal to TIM8)
Set TIM8 to One Pulse Mode and set the pulse width to exactly half the period. Set it to "slave" mode, where it is triggered by the ITR signal from TIM1.
In this configuration, TIM1_CH1 determines the moments when TIM8 generates a positive pulse, and thus it can be easily shifted to any part of the TIM1 period (by changing the CH1 value). TIM8 serves only as a pulse generator with a half-period width.
Another option is to use "Asymmetric PWM mode" and generate the signal using only one timer. However, I am not sure if it is possible in this mode to shift the phase by a full 360° or only by 180°.