cancel
Showing results for 
Search instead for 
Did you mean: 

STM32L452 LSE & PC13 Errata

MMeie.3
Associate II

Hi

 

We use an STM32L452 with an external LSE (32.786 kHz) oscillator. We would like to use PC13 as a GPIO input with interrupt.

 

In the errata sheet for the STM32L452 (ES0388 Rev9) I find the following entry:

“2.2.12 PC13 signal transitions disturb LSE

Description

The PC13 port toggling disturbs the LSE clock.

Workaround

None.“

 

What does “disturbs" mean for the LSE? What is the impact, if PC13 is used as a GPIO input with interrupt?

1 ACCEPTED SOLUTION

Accepted Solutions
MMeie.3
Associate II

In case somebody else is interested, I got feedback from ST support about this:
1) “2.2.12 PC13 signal transitions disturb LSE", What does “disturbs” mean for the LSE
ST support: When PC13 is toggled, the LSE clock frequency may lose a few pulses.

2) What is the impact, if PC13 is used as a GPIO input with interrupt?
ST support: This has an impact on the LSE when PC13 is used as input or output.

View solution in original post

10 REPLIES 10

For all normal intents and purposes, the errata means, when using LSE, you should simply not use PC13 at all.

If you want to know more, you should talk to ST directly. Please note that this is a primarily user-driven forum with casual ST presence.

JW

AScha.3
Chief II

Curious detail on the huge spread "blue pill" boards :

the LED is on pin ..what is to be expected? PC13 !


_legacyfs_online_stmicro_images_0693W00000bkzPMQAY.png

If you feel a post has answered your question, please click "Accept as Solution".

Poor choice in general as it's a low power / current pin too.

Generally I'd translate "disturbs" as altering or interfering with the time accuracy in this context. Perhaps either as a direct result of "counting" some errant pulse(s) or loading the domain in a why that alters the characteristics of the crystal circuit / io-cells.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..

I would expect that an unexpectedly high coupling between PC13 and PC14 has been discovered, electromagnetic or ohmic, or related ground issues. I would expect the impact of PC13 on LSE depend on several factors, such as VBAT domain voltage, the oscillator's power/amplitude, mode of operation of PC13 (input, output) and slew rate of the signal on PC13.

IMO that's why the wording "

At any case, even if it's certainly an embarrassing discovery, the erratum is more of a CYA than relevant technical information. For example, PC13 is also RTC_OUT in some STM32, and one of its purposes is the RTC calibration output. Does this mean, that calibration is essentially unusable, as RTC would disturb its own clock?

Also, while most errata where this erratum is present has a wording (as in the opening post of this thread) which effectively entirely precludes using PC13 and LSE at the same time; STM32F407's erratum is formulated quite a bit differently:

PC13 signal transitions disturb LSE

Description

The PC13 input/output toggling disturbs the LSE clock. As a result, PC13 may not be usable when LSE is used.

Workaround

Use an external clock with the LSE in bypass mode.

Go figure.

JW

Not sure, if this Issue also applies to the STM32F103. On the first look I could not see any entry in the Errata sheet.

maybe....anyway PC13 use is...problematic


_legacyfs_online_stmicro_images_0693W00000bl72aQAA.png
_legacyfs_online_stmicro_images_0693W00000bl72fQAA.pngfrom F103 ds .Table 5 .

If you feel a post has answered your question, please click "Accept as Solution".

The description in the errata of the STM32F407 is much clearer to me. I also notice, that the errata entry was only added in February 2023. So, I wonder what is with older designs out there...

In this respect, PC13 on 'F1xx is no different from PC13 on other STM32 (perhaps except 'L0) - they all are in the VBAT domain behind the current-limited switch, and their GPIO function is overriden by RTC.

JW

MMeie.3
Associate II

In case somebody else is interested, I got feedback from ST support about this:
1) “2.2.12 PC13 signal transitions disturb LSE", What does “disturbs” mean for the LSE
ST support: When PC13 is toggled, the LSE clock frequency may lose a few pulses.

2) What is the impact, if PC13 is used as a GPIO input with interrupt?
ST support: This has an impact on the LSE when PC13 is used as input or output.