[STM32L431] BORRSTF always SET after powering up

[warningyukihyo]

Hello,

I want to read the BORRSTF value to detect the previous reset situation during the start process. but BORRSTF always reports '1'.

BORRSTF can be clear with RMVF, but there is a problem that makes it impossible to tell whether it is an initial start or a after brown out reset.

I tried the following:

1. Check ramp-up time problem of power supply. - but I didn't find anything strange.
2. Increase capacitance of the reset pin for the longer reset delay. - I've increased it from 0.1 uf to 4.7 uF, but problem is not solved.

I looked for similar cases, but I couldn't find the same one... Is there a problem with my design?

Attached power and reset circuit diagram I designed. thanks.

p.s I've found the same thing on STM32F407VGT-based PCB before year. I didn't take it seriously then, but now I want to know why.

[TDK]

Look at all the flags to understand what happened, not just the BORRSTF. At power-on, PORRSTF is also set.

If PORRSTF and BORRSTF -> power on

If not PORRSTF and BORRSTF -> BOR

Somewhere there is a table which shows the flags for various reset conditions. If I find it, I will add it here.

Edit: the above is true for the STM32F4 family, which you mentioned. It doesn't look like there is a PORRSTF flag on the L4 family.

[warningyukihyo]

@TDKThank you for reply. (I clicked the accepted button mistake, sorry.)

Yes, as you mentioned at the edit, STM32L4 does not have PORRSTF. according to my short experiment, BORRSTF and PINRSTF are activated at initial powering up. but it still seems unclear to me.

Just a moment ago, I found the same BORRSTF issue on evaluation board known as 'Blackpill' (STM32F411). what I'm really curious about is, why is BORRSTF active on initial power up? this behavior is not documented anywhere, like RM0394 'Reference manual for STM32L4'.

[TDK · Accepted solution]

> why is BORRSTF active on initial power up?

0V is below the BOR threshold.

> this behavior is not documented anywhere, like RM0394 'Reference manual for STM32L4'.

It absolutely is in there. Reset value shown that BORRSTF is high on startup.

More to your point, looks like there isn't a reliable way on here to differentiate between POR and BOR. You could set a magic value in SRAM on startup and if during the next startup it's the magic value (instead of 0x00 or 0xFF or random data), likely it was a BOR.

[warningyukihyo]

@TDKThank you for your answer.

Oops, I was making a false assumption that the initial value of the CSR register would of course be filled 0. thank you for your correction. 🙂

I agree with you regarding POR flags. fortunately, I think it can be solve through linker settings.

[Piranha]

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looks like there isn't a reliable way on here to differentiate between POR and BOR.

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Is there any real difference between those? The only one I see is just a different voltage threshold levels.