STM32L1xx
RTC counter
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‎2021-01-29 4:17 AM
RTC used the LSE with 32768Hz oscillator and is configured for this option.
While DBP bit is set RTC counter is stopped .
Is it true or false?
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RCC
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RTC
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STM32L1 Series
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‎2021-01-29 4:47 AM
False.
DBP is a bit to: Disable backup domain write protection. Setting it will enable the write access to RTC and backup registers, resetting it will disable it. But neither setting nor resetting will stop the RTC.
When your question is answered, please close this topic by choosing Select as Best. This will help other users find that answer faster.
Good luck!
/Peter
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‎2021-01-29 4:47 AM
False.
DBP is a bit to: Disable backup domain write protection. Setting it will enable the write access to RTC and backup registers, resetting it will disable it. But neither setting nor resetting will stop the RTC.
When your question is answered, please close this topic by choosing Select as Best. This will help other users find that answer faster.
Good luck!
/Peter
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‎2021-01-29 5:03 AM
Thank you.
But why if I let always the DBP bit set the callendar is frozzen? That thing makes me to think that the RTC counter is stopped while DBP is set.
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‎2021-01-29 5:10 AM
and why the WUTF can be reset only if DBP is set? in the user manual we have the next mention:
"This register is write protected (except for RTC_ISR[13:8] bits)" and WUTF is on the position 10.
So that bit should be cleared without to set DBP.
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‎2021-01-29 8:49 AM
You are right. I made a mistake at the RTC initilization. I reset the RTC INIT flag after that I locked the RTC registers and the INIT flag was always true.
Thank you for your support.
