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STM32H753VI - How to change the NRST output back to an input after a software reset

anonymous.8
Senior II

STM32H753VI

Our product has (1) stm32h753vi in a multiprocessor system.

Processor #2 has a GPIO pin connected to NRST on the stm32h753vi with a 10K pull up.

Processor #2 will need to reset the stm32h753vi by driving it's GPIO pin under certain conditions.

On the stm32h753vi there is a:

 bootloader at 0800 0000

 application at 0801 0000

The bootloader jumps to the application by performing a software reset (see code below).

This was done this way to solve the problem of relocating the interrupt vector table.

On page 312/3247 RM0433 Rev 5 (STM32H753 Reference Manual)

Table 50. Reset distribution summary (continued)

This table suggests that the NRST line is being driven as an output during the software reset operation.

What I am seeing is that after the software reset is finished (the application is running ok) 

NRST seems to still be an output - causing processor #2 not able to drive the NRST line all the way to low.

Question: After performing a software reset in this manner how do you change the NRST output back to being an input?

From Table 50 it would seem this same situation will apply for a watchdog timer reset as well... 

Thanks in advance for your help

__ramfunc static void Jump(unsigned int address)

{

 /* set the boot address after reset */

 MODIFY_REG(SYSCFG->UR2, SYSCFG_UR2_BOOT_ADD0, ((address >> 16) << POSITION_VAL(SYSCFG_UR2_BOOT_ADD0)));

 /* Ensure all outstanding memory accesses including buffered write are completed before reset */

 __DSB();

 __ISB();

 /* reset */

 SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)  |

              (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |

              SCB_AIRCR_SYSRESETREQ_Msk  );     /* Keep priority group unchanged */

 __DSB();                             /* Ensure completion of memory access */

 while (1)                             /* wait until reset */

 {

  __NOP();

 }

}

2 REPLIES 2

NRST in STM32 is an input with an internal pullup (cca 40kOhm) and a filter, connected with an open-drain output (i.e. a single transistor switching to ground) for the internally generated resets to be propagated outwards. I doubt this is different for the 'H7.

In some STM32 NRST can be shared with an IO, but this is not the case of 'H7 as far as I can tell.

JW

berendi
Principal

> Processor #2 has a GPIO pin connected to NRST on the stm32h753vi with a 10K pull up.

Was this GPIO ever an active high output? That might have damaged the NRST circuitry inside.