STM32H750B-DK not able to program using system workbench

[VAgga]

I have purchased STM32H750B-DK. I am using system workbench for stm32 as IDE. Now i downloaded STM32CubeH7 library and trying to download GPIO_IO_Toggle example program into this board but getting the error as below:

17:31:42 **** Programming project XIP_QSPI_InternalSRAM on chip ****

"C:\\Ac6\\SystemWorkbench\\plugins\\fr.ac6.mcu.externaltools.openocd.win32_1.23.0.201904120827\\tools\\openocd\\bin\\openocd.exe" -f stm32.flash.7461493753358478492.cfg -s "D:\\source\\STM32CubeH7\\Projects\\STM32H750B-DK\\Examples\\GPIO\\GPIO_IOToggle\\SW4STM32\\XIP_QSPI_InternalSRAM" -s "C:\\Ac6\\SystemWorkbench\\plugins\\fr.ac6.mcu.debug_2.5.0.201904120827\\resources\\openocd\\st_scripts" -c "program Debug/XIP_QSPI_InternalSRAM.elf verify " -c shutdown 

Open On-Chip Debugger 0.10.0+dev-00021-g524e8c8 (2019-04-12-08:48)

Licensed under GNU GPL v2

For bug reports, read

http://openocd.org/doc/doxygen/bugs.html

srst_only separate srst_nogate srst_open_drain connect_assert_srst

Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD

adapter speed: 4000 kHz

adapter_nsrst_delay: 100

Info : clock speed 4000 kHz

Info : STLINK v3 JTAG v3 API v3 M2 VID 0x0483 PID 0x374E

Info : using stlink api v3

Info : Target voltage: 3.290245

Info : Unable to match requested speed 4000 kHz, using 3300 kHz

Info : Stlink adapter speed set to 3300 kHz

Info : STM32H750XBHx.cpu0: hardware has 8 breakpoints, 4 watchpoints

Info : Listening on port 3333 for gdb connections

target halted due to debug-request, current mode: Thread 

xPSR: 0x01000000 pc: 0x080002d8 msp: 0x20020000

Info : Unable to match requested speed 4000 kHz, using 3300 kHz

Info : Stlink adapter speed set to 3300 kHz

Info : Unable to match requested speed 4000 kHz, using 3300 kHz

adapter speed: 3300 kHz

** Programming Started **

auto erase enabled

Info : Device: STM32H7xx 2M

Info : flash size probed value 128

Info : STM32H flash size is 128kb, base address is 0x8000000

Warn : no flash bank found for address 90000000

Warn : no flash bank found for address 90001190

wrote 0 bytes from file Debug/XIP_QSPI_InternalSRAM.elf in 0.006981s (0.000 KiB/s)

** Programming Finished **

** Verify Started **

Error: timed out while waiting for target halted

target halted due to debug-request, current mode: Handler HardFault

xPSR: 0x81000003 pc: 0x080009ce msp: 0x2001ffe0

Error: error executing cortex_m crc algorithm

Error: checksum mismatch - attempting binary compare

diff 0 address 0x90000000. Was 0x11 instead of 0x00

diff 1 address 0x90000002. Was 0x00 instead of 0x02

diff 2 address 0x90000003. Was 0x00 instead of 0x20

diff 3 address 0x90000004. Was 0x00 instead of 0x45

diff 4 address 0x90000005. Was 0x10 instead of 0x0f

diff 5 address 0x90000008. Was 0x00 instead of 0x07

diff 6 address 0x90000009. Was 0x00 instead of 0x11

diff 7 address 0x9000000b. Was 0x00 instead of 0x90

diff 8 address 0x9000000c. Was 0xc0 instead of 0x09

diff 9 address 0x9000000d. Was 0x5d instead of 0x11

diff 10 address 0x9000000f. Was 0x00 instead of 0x90

diff 11 address 0x90000010. Was 0x40 instead of 0x0b

diff 12 address 0x90000011. Was 0x1f instead of 0x11

diff 13 address 0x90000013. Was 0x00 instead of 0x90

diff 14 address 0x90000014. Was 0xe4 instead of 0x0d

diff 15 address 0x90000015. Was 0x0c instead of 0x11

diff 16 address 0x90000017. Was 0x00 instead of 0x90

diff 17 address 0x90000018. Was 0xe8 instead of 0x0f

diff 18 address 0x90000019. Was 0x03 instead of 0x11

diff 19 address 0x9000001b. Was 0x00 instead of 0x90

diff 20 address 0x9000001c. Was 0xc8 instead of 0x00

diff 21 address 0x90000020. Was 0x32 instead of 0x00

diff 22 address 0x90000024. Was 0x05 instead of 0x00

diff 23 address 0x9000002c. Was 0x00 instead of 0x95

diff 24 address 0x9000002d. Was 0x00 instead of 0x0f

diff 25 address 0x9000002f. Was 0x00 instead of 0x90

diff 26 address 0x90000030. Was 0x00 instead of 0x11

diff 27 address 0x90000031. Was 0x00 instead of 0x11

diff 28 address 0x90000033. Was 0x00 instead of 0x90

diff 29 address 0x90000038. Was 0x00 instead of 0x95

diff 30 address 0x90000039. Was 0x00 instead of 0x0f

diff 31 address 0x9000003b. Was 0x00 instead of 0x90

diff 32 address 0x9000003c. Was 0x00 instead of 0x13

diff 33 address 0x9000003d. Was 0x00 instead of 0x11

diff 34 address 0x9000003f. Was 0x00 instead of 0x90

diff 35 address 0x90000040. Was 0x00 instead of 0x95

diff 36 address 0x90000041. Was 0x00 instead of 0x0f

diff 37 address 0x90000043. Was 0x00 instead of 0x90

diff 38 address 0x90000044. Was 0x00 instead of 0x95

diff 39 address 0x90000045. Was 0x00 instead of 0x0f

diff 40 address 0x90000047. Was 0x00 instead of 0x90

diff 41 address 0x90000048. Was 0x00 instead of 0x95

diff 42 address 0x90000049. Was 0x00 instead of 0x0f

diff 43 address 0x9000004b. Was 0x00 instead of 0x90

diff 44 address 0x9000004c. Was 0x00 instead of 0x95

diff 45 address 0x9000004d. Was 0x00 instead of 0x0f

diff 46 address 0x9000004f. Was 0x00 instead of 0x90

diff 47 address 0x90000050. Was 0x00 instead of 0x95

diff 48 address 0x90000051. Was 0x00 instead of 0x0f

diff 49 address 0x90000053. Was 0x00 instead of 0x90

diff 50 address 0x90000054. Was 0x00 instead of 0x95

diff 51 address 0x90000055. Was 0x00 instead of 0x0f

diff 52 address 0x90000057. Was 0x00 instead of 0x90

diff 53 address 0x90000058. Was 0x00 instead of 0x95

diff 54 address 0x90000059. Was 0x00 instead of 0x0f

diff 55 address 0x9000005b. Was 0x00 instead of 0x90

diff 56 address 0x9000005c. Was 0x00 instead of 0x95

diff 57 address 0x9000005d. Was 0x00 instead of 0x0f

diff 58 address 0x9000005f. Was 0x00 instead of 0x90

diff 59 address 0x90000060. Was 0x00 instead of 0x95

diff 60 address 0x90000061. Was 0x00 instead of 0x0f

diff 61 address 0x90000063. Was 0x00 instead of 0x90

diff 62 address 0x90000064. Was 0x00 instead of 0x95

diff 63 address 0x90000065. Was 0x00 instead of 0x0f

diff 64 address 0x90000067. Was 0x00 instead of 0x90

diff 65 address 0x90000068. Was 0x00 instead of 0x95

diff 66 address 0x90000069. Was 0x00 instead of 0x0f

diff 67 address 0x9000006b. Was 0x00 instead of 0x90

diff 68 address 0x9000006c. Was 0x00 instead of 0x95

diff 69 address 0x9000006d. Was 0x00 instead of 0x0f

diff 70 address 0x9000006f. Was 0x00 instead of 0x90

diff 71 address 0x90000070. Was 0x00 instead of 0x95

diff 72 address 0x90000071. Was 0x00 instead of 0x0f

diff 73 address 0x90000073. Was 0x00 instead of 0x90

diff 74 address 0x90000074. Was 0x00 instead of 0x95

diff 75 address 0x90000075. Was 0x00 instead of 0x0f

diff 76 address 0x90000077. Was 0x00 instead of 0x90

diff 77 address 0x90000078. Was 0x00 instead of 0x95

diff 78 address 0x90000079. Was 0x00 instead of 0x0f

diff 79 address 0x9000007b. Was 0x00 instead of 0x90

More than 128 errors, the rest are not printed.

embedded:startup.tcl:476: Error: ** Verify Failed **

in procedure 'program' 

in procedure 'program_error' called at file "embedded:startup.tcl", line 521

at file "embedded:startup.tcl", line 476

17:32:03 Build Finished (took 20s.731ms)

Any help would be highly appreciated.

[Tesla DeLorean]

Looks like it needs an "external loader" for the pair of 512Mbit Micron RW187 devices on the board. Or dual die 1GBit part if used instead.

https://www.micron.com/products/nor-flash/serial-nor-flash/part-catalog/mt25ql512abb8esf-0sit

@Andreas Bolsch​ 

[Andreas Bolsch]

Indeed, "Warn : no flash bank found for address 90000000 Warn : no flash bank found for address 90001190" shows that this memory range is simply discarded from the elf file. I'm afraid you have to build a patched version of openocd yourself to use this board: http://openocd.zylin.com/#/c/4321/

I don't have that particular board (as Mouser refused to sell it to me due to this export control stuff ;) ), but as far as I know it's actually the very same as STM32H745I-DISCO (which I got from the very same source without any trouble) except for the 'crippled' MCU. Therefore the cfg file 'stm32h745i-disco.cfg' (included in the patchset) should work for this board, too.

[Tesla DeLorean]

STM32H745I-DISCO and STM32H750B-DK are materially identical at a board level.

You're in Germany? AVNET/EBVElektronik claims to hold some stock. You know the system is entirely broken when I can pull H750 boards/parts from China with less of a circus..

@STOne-32​ can you drop-ship Andreas an STM32H750B-DK board in support of the OpenOCD work? Thanks

[Pavel A.]

H750 has only one page of internal flash (128K). But this is more than enough for simple blinky type example.

So maybe you can just use a simple example which does not need pre-loading stuff into external memory.

And be happy :)

-- pa

[Tesla DeLorean]

The OP is clearly trying to get the QSPI External Memory to function properly, something these tools should be able to achieve. You start with something simple, and expand from there.

The H750 has 2MB of viable flash last time I checked, though the label on the tin suggests otherwise.

The general goal with the H750 is to use the only sector you supposedly have to bring up and run code from the QSPI. You're not going to be able to do anything remotely interesting with this board using just the 128KB of FLASH.

I've seen the H750 paired with a QSPI NAND device, but this doesn't permit execute-in-place (XIP)