STM32H745ZIT3 FMC-NAND Flash IS34_35ML04G081 data corrupted

[rahul8878]

I am using stm32h745zit3, with the flash is IS34_35ML04G081. I have initialize the below parameter but after writing in to the flash and reading the data but some bytes are corrupted. Please help to resolve this issue.

uint8_t buffer[2048] = {0};

int main(void)
{
    // Initialize the HAL Library and reset all peripherals
    HAL_Init();

    // Configure the system clock
    SystemClock_Config();

    // Initialize FMC (Flexible Memory Controller)
    FMC_Init();

    for (int i = 0, j = 0; i < 2048; i++)
    {
        buffer[j] = j++;
        if (j > 100)
            j = 0;
    }

    while (1)
    {
        HAL_NAND_Write_Page_8b(&hnand1, Address, writeBuff, 1);
        LL_mDelay(1000);
        HAL_NAND_Read_Page_8b(&hnand1, &writeAddress, downloadBff1, 1);
        LL_mDelay(1000);
    }
}

/*******************************************************************************
 * Function Name  : SystemClock_Config
 * Description    : System Clock Configuration
 *                  Configures clocks, PLL, and related peripherals.
 * Input          : None
 * Output         : None
 * Return         : None
 ******************************************************************************/
void SystemClock_Config(void)
{
    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
    RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};

    // Supply configuration update enable
    HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);

    // Configure the main internal regulator output voltage
    __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);

    // Wait until voltage scaling flag is ready
    while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY))
    {
    }

    // Macro to configure the PLL clock source
    __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE);

    /** Initializes the RCC Oscillators according to the specified parameters
     * in the RCC_OscInitTypeDef structure. */
    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
    RCC_OscInitStruct.PLL.PLLM = 2;
    RCC_OscInitStruct.PLL.PLLN = 66;
    RCC_OscInitStruct.PLL.PLLP = 2;
    RCC_OscInitStruct.PLL.PLLQ = 17;
    RCC_OscInitStruct.PLL.PLLR = 2;
    RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
    RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
    RCC_OscInitStruct.PLL.PLLFRACN = 0;

    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
    {
        // Initialization Error
        Error_Handler();
    }

    // Peripheral clock enable
    __HAL_RCC_FMC_CLK_ENABLE();

    // Initialize peripheral clock for FMC
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FMC;
    PeriphClkInitStruct.PLL2.PLL2M = 2;
    PeriphClkInitStruct.PLL2.PLL2N = 21;
    PeriphClkInitStruct.PLL2.PLL2P = 2;
    PeriphClkInitStruct.PLL2.PLL2Q = 4;
    PeriphClkInitStruct.PLL2.PLL2R = 2;

    PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
    PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
    PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_PLL2;

    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
    {
        // Initialization Error */
        Error_Handler();
    }

    /** Initializes the peripherals clock
     *   For the USB_FS pphl */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
    PeriphClkInitStruct.PLL3.PLL3M = 4;
    PeriphClkInitStruct.PLL3.PLL3N = 32;
    PeriphClkInitStruct.PLL3.PLL3P = 2;
    PeriphClkInitStruct.PLL3.PLL3Q = 4;
    PeriphClkInitStruct.PLL3.PLL3R = 2;
    PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_2;
    PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
    PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
    {
        // Initialization Error
        Error_Handler();
    }

    // Initializes the CPU, AHB and APB buses clocks
    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1;
    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
    RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
    RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
    RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
    RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
    RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
    RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;

    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
    {
        // Initialization Error
        Error_Handler();
    }

    // Configure MCO output
    HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1);

    // activate CSI clock (required for I/O Compensation Cell)
    __HAL_RCC_CSI_ENABLE();

    // Enable SYSCFG clock (required for I/O Compensation Cell)
    __HAL_RCC_SYSCFG_CLK_ENABLE();

    // Enables the I/O Compensation Cell
    HAL_EnableCompensationCell();
}

/*******************************************************************************
 * Function Name : FMC_Init
 * Description   : Initialize the FMC (Flexible Memory Controller) for NAND
 *                 memory access.
 *                 This function sets up the controller for NAND flash operations.
 * Input         : None
 * Output        : None
 * Return        : None
 ******************************************************************************/
void FMC_Init(void)
{
    // USER CODE BEGIN FMC_Init 0

    FMC_NAND_PCC_TimingTypeDef ComSpaceTiming = {0}; // Common space timing structure
    FMC_NAND_PCC_TimingTypeDef AttSpaceTiming = {0}; // Attribute space timing structure

    // Initialize the NAND1 memory
    hnand1.Instance = FMC_NAND_DEVICE;

    // hnand1.Init: Configuring NAND bank and settings
    hnand1.Init.NandBank = FMC_NAND_BANK3;
    hnand1.Init.Waitfeature = FMC_NAND_WAIT_FEATURE_DISABLE;
    hnand1.Init.MemoryDataWidth = FMC_NAND_MEM_BUS_WIDTH_8;
    hnand1.Init.EccComputation = FMC_NAND_ECC_DISABLE;
    hnand1.Init.ECCPageSize = FMC_NAND_ECC_PAGE_SIZE_256BYTE;
    hnand1.Init.TCLRSetupTime = TCLRSETUPtIME;
    hnand1.Init.TARSetupTime = TARSETUPTIME;

    // hnand1.Config: NAND memory configuration settings
    hnand1.Config.PageSize = 2048;    // Page size
    hnand1.Config.SpareAreaSize = 64; // Spare area size
    hnand1.Config.BlockSize = 64;     // Number of pages in a block
    hnand1.Config.BlockNbr = 4096;    // Total number of blocks
    hnand1.Config.PlaneNbr = 2;       // Number of planes
    hnand1.Config.PlaneSize = 2048;   // Size of each plane
    hnand1.Config.ExtraCommandEnable = ENABLE;

    // Configure common space timing
    ComSpaceTiming.SetupTime = 2;
    ComSpaceTiming.WaitSetupTime = 4;
    ComSpaceTiming.HoldSetupTime = 2;
    ComSpaceTiming.HiZSetupTime = 4;

    // Attribute space timing mirrors common space timing
    AttSpaceTiming.SetupTime = ComSpaceTiming.SetupTime;
    AttSpaceTiming.WaitSetupTime = ComSpaceTiming.WaitSetupTime;
    AttSpaceTiming.HoldSetupTime = ComSpaceTiming.HoldSetupTime;
    AttSpaceTiming.HiZSetupTime = ComSpaceTiming.HiZSetupTime;

    // Initialize the NAND interface and check the result
    if (HAL_NAND_Init(&hnand1, &ComSpaceTiming, &AttSpaceTiming) != HAL_OK)
    {
        // Initialization Error
        Error_Handler();
    }
}

[Tesla DeLorean]

Your code looks incomplete, buffer initialization look sketchy

Perhaps start by doing one, instrument the code some via a serial console, show the delta between expected.

Does it need an Erase? Check the initialization. Pull some data sheets, and do some debugging.

https://www.issi.com/WW/pdf/IS34_35ML04G081.pdf

Probably very few with your part choice or hardware, you'll probably need to own this.

[rahul8878]

I have initiated with

uint8_t downloadBff1[2112] = "", writeBuff[2112] = "";

WriteAddress and

If starting of the block (0th page) I am using erase.

Then also same issue is coming