2020-02-22 06:52 PM
MCU is STM32H743ZI. When QUADSPI working in AutoPolling mode,Setting the ABORT bit in the QUADSPI_CR, Why SR.BUSY bit stall high? BUSY don't goes low forever!But according to referrence manual,"In automatic-polling mode, BUSY goes low only after the last periodic access is complete,due to a match when APMS = 1, or due to an abort." My source code is below:
/**************************************************************
* @brief QUADSPI work at status flag polling mode(automatic-polling mode)
* @param cmd: command to send(FLASH Status polling command)
* @retv @0:match; @1: not match,time out.
*****************************************************************/
uint8_t QSPI_StatusPolling(uint8_t cmd,uint32_t timeout)
{
__IO uint32_t ccr;
uint8_t retv;
QUADSPI->DLR = 1; // read data bytes: 1
ccr = 2<<QUADSPI_CCR_FMODE_Pos; // FMOD=2: status flag polling mode
ccr |= 1<<QUADSPI_CCR_IMODE_Pos; // Instruction Mode: single line
ccr |= 1<<QUADSPI_CCR_DMODE_Pos; // CCR.DMODE: Data Mode: single line
ccr |= cmd;
QUADSPI->CCR = ccr; // begin access
while( ((QUADSPI->SR&QUADSPI_SR_SMF_Msk)==0) && (timeout>0) ) // wait until Status Match or timeout
{
timeout--;
delay_us(1);
}
QUADSPI->CR |= QUADSPI_CR_ABORT_Msk; // aborts the on-going command sequence
while(QUADSPI->SR&QUADSPI_SR_BUSY_Msk) {} // wait when SR.BUSY=1 ,stay here for ever!!!!!!!!!!!!
ccr = QUADSPI->DR; // clear FTF
if(timeout==0) retv=1;
else retv=0;
return(retv);
}